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STM32C0 support
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arch.mk

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@@ -83,6 +83,17 @@ ifeq ($(ARCH),ARM)
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CORTEX_M0=1
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SPI_TARGET=stm32
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endif
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ifeq ($(TARGET),stm32c0)
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CORTEX_M0=1
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ARCH_FLASH_OFFSET=0x08000000
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# Enable this feature for secure memory support
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# Makes the flash sectors for the bootloader unacessible from the application
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# Requires using the STM32CubeProgrammer to set FLASH_SECR -> SEC_SIZE pages
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CFLAGS+=-DFLASH_SECURABLE_MEMORY_SUPPORT
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endif
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ifeq ($(TARGET),stm32g0)
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CORTEX_M0=1
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ARCH_FLASH_OFFSET=0x08000000

config/examples/stm32c0.config

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ARCH?=ARM
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TARGET?=stm32c0
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SIGN?=ED25519
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#Using SHA384 with ED25519 saves about 2kB without SHA256 code
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HASH?=SHA384
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DEBUG?=0
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VTOR?=1
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CORTEX_M0?=1
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NO_ASM?=0
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EXT_FLASH?=0
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SPI_FLASH?=0
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ALLOW_DOWNGRADE?=0
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NVM_FLASH_WRITEONCE?=1
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WOLFBOOT_VERSION?=0
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V?=0
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SPMATH?=1
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RAM_CODE?=1
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DUALBANK_SWAP?=0
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#Max APP size is 4kB
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WOLFBOOT_PARTITION_SIZE?=0x2000
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WOLFBOOT_SECTOR_SIZE?=0x800
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#Max WOLFBOOT size is 14kB. Currently only 10kB
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WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x08003800
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WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x08005800
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WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x08007800
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#For a debug/not size optimized layout:
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#DEBUG?=1
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#WOLFBOOT_PARTITION_SIZE?=0x1000
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#WOLFBOOT_SECTOR_SIZE?=0x800
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#WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x08005800
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#WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x08006800
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#WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x08007800
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docs/HAL.md

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## Supported platforms
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The following platforms are supported in the current version:
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- STM32F4, STM32L5, STM32L0, STM32F7, STM32H7, STM32G0
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- STM32F4, STM32L5, STM32L0, STM32F7, STM32H7, STM32G0, STM32C0
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- nRF52
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- Atmel samR21
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- TI cc26x2

docs/Targets.md

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* [STM32L4](#stm32l4)
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* [STM32L5](#stm32l5)
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* [STM32G0](#stm32g0)
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* [STM32C0](#stm32c0)
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* [STM32H7](#stm32h7)
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* [STM32U5](#stm32u5)
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* [STM32WB55](#stm32wb55)
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mon reset init
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```
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## STM32C0
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Supports STM32C0x0/STM32C0x1.
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Example and instructions are for the STM Nucleo-C031C6 dev board using the
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STM32Cube
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Example 32KB partitioning on STM32-G070:
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- Sector size: 2KB
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- Wolfboot partition size: 14KB
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- Application partition size: 8 KB
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- Swap size 2KB
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```C
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#define WOLFBOOT_SECTOR_SIZE 0x800 /* 2 KB */
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#define WOLFBOOT_PARTITION_BOOT_ADDRESS 0x08004000 /* offset 16kB to 24kB */
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#define WOLFBOOT_PARTITION_SIZE 0x2000 /* 8 KB */
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#define WOLFBOOT_PARTITION_UPDATE_ADDRESS 0x08006000 /* offset 24kB to 32kB */
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#define WOLFBOOT_PARTITION_SWAP_ADDRESS 0x08003800 /* offset 14kB to 16kB */
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```
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### Building STM32C0
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xxx
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Reference configuration (see [/config/examples/stm32g0.config](/config/examples/stm32g0.config)).
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You can copy this to wolfBoot root as `.config`: `cp ./config/examples/stm32g0.config .config`.
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To build you can use `make`.
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The TARGET for this is `stm32g0`: `make TARGET=stm32g0`.
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The option `CORTEX_M0` is automatically selected for this target.
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The option `NVM_FLASH_WRITEONCE=1` is mandatory on this target, since the IAP driver does not support
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multiple writes after each erase operation.
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This target also supports secure memory protection on the bootloader region
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using the `FLASH_CR:SEC_PROT` and `FLASH_SECT:SEC_SIZE` registers. This is the
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number of 2KB pages to block access to from the 0x8000000 base address.
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```
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STM32_Programmer_CLI -c port=swd mode=hotplug -ob SEC_SIZE=0x10
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```
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For RAMFUNCTION support (required for SEC_PROT) make sure `RAM_CODE=1`.
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### STM32C0 Programming
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xxx
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Compile requirements: `make TARGET=stm32g0 NVM_FLASH_WRITEONCE=1`
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The output is a single `factory.bin` that includes `wolfboot.bin` and `test-app/image_v1_signed.bin` combined together.
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This should be programmed to the flash start address `0x08000000`.
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Flash using the STM32CubeProgrammer CLI:
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```
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STM32_Programmer_CLI -c port=swd -d factory.bin 0x08000000
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```
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### STM32C0 Debugging
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xxx
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Use `make DEBUG=1` and program firmware again.
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Start GDB server on port 3333:
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```
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ST-LINK_gdbserver -d -e -r 1 -p 3333
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OR
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st-util -p 3333
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```
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wolfBoot has a .gdbinit to configure GDB
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```
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arm-none-eabi-gdb
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add-symbol-file test-app/image.elf 0x08008100
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mon reset init
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```
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## STM32WB55
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