Improvements to startup and UART driver

Author: trini

hal/mpfs250.c

@@ -130,152 +130,91 @@ void* hal_get_dts_address(void)
 #define DEBUG_UART_BASE MSS_UART1_LO_BASE
 #endif
 
-/***************************************************************************//**
- * Configure baud divisors using fractional baud rate if possible.
+/* Configure baud divisors with fractional baud rate support.
+ *
+ * UART baud rate divisor formula: divisor = PCLK / (baudrate * 16)
+ *
+ * To support fractional divisors (6-bit, 0-63), we scale up the calculation:
+ *   divisor_x128 = (PCLK * 8) / baudrate  (128x scaled for rounding precision)
+ *   divisor_x64  = divisor_x128 / 2       (64x scaled for 6-bit fractional)
+ *   integer_div  = divisor_x64 / 64       (integer portion of divisor)
+ *   frac_div     = divisor_x64 % 64       (fractional portion, 0-63)
+ *
+ * The fractional part is then adjusted using the x128 value for rounding.
  */
-static void config_baud_divisors(uint32_t baudrate)
+static void uart_config_clk(uint32_t baudrate)
 {
-    uint32_t baud_value;
-    uint32_t baud_value_by_64;
-    uint32_t baud_value_by_128;
-    uint32_t fractional_baud_value;
-    uint64_t pclk_freq;
-
-    /* Use the system clock value from hw_platform.h */
-    pclk_freq = MSS_APB_AHB_CLK;
-
-    /*
-    * Compute baud value based on requested baud rate and PCLK frequency.
-    * The baud value is computed using the following equation:
-    *      baud_value = PCLK_Frequency / (baud_rate * 16)
-    */
-    baud_value_by_128 = (uint32_t)((8UL * pclk_freq) / baudrate);
-    baud_value_by_64 = baud_value_by_128 / 2u;
-    baud_value = baud_value_by_64 / 64u;
-    fractional_baud_value = baud_value_by_64 - (baud_value * 64u);
-    fractional_baud_value += (baud_value_by_128 - (baud_value * 128u))
-                            - (fractional_baud_value * 2u);
-
-    if (baud_value <= (uint32_t)UINT16_MAX) {
-        if (baud_value > 1u) {
-            /*
-             * Use Fractional baud rate divisors
-             */
-            /* set divisor latch */
-            MMUART_LCR(DEBUG_UART_BASE) |= DLAB_MASK;
-
-            /* baud value */
-            MMUART_DMR(DEBUG_UART_BASE) = (uint8_t)(baud_value >> 8);
-            MMUART_DLR(DEBUG_UART_BASE) = (uint8_t)baud_value;
-
-            /* reset divisor latch */
-            MMUART_LCR(DEBUG_UART_BASE) &= ~DLAB_MASK;
-
-            /* Enable Fractional baud rate */
-            MMUART_MM0(DEBUG_UART_BASE) |= EFBR_MASK;
-
-            /* Load the fractional baud rate register */
-            MMUART_DFR(DEBUG_UART_BASE) = (uint8_t)fractional_baud_value;
-        }
-        else {
-            /*
-            * Do NOT use Fractional baud rate divisors.
-            */
-            /* set divisor latch */
-            MMUART_LCR(DEBUG_UART_BASE) |= DLAB_MASK;
-
-            /* baud value */
-            MMUART_DMR(DEBUG_UART_BASE) = (uint8_t)(baud_value >> 8u);
-            MMUART_DLR(DEBUG_UART_BASE) = (uint8_t)baud_value;
-
-            /* reset divisor latch */
-            MMUART_LCR(DEBUG_UART_BASE) &= ~DLAB_MASK;
-
-            /* Disable Fractional baud rate */
-            MMUART_MM0(DEBUG_UART_BASE) &= ~EFBR_MASK;
-        }
+    const uint64_t pclk = MSS_APB_AHB_CLK;
+
+    /* Scale up for precision: (PCLK * 128) / (baudrate * 16) */
+    uint32_t div_x128 = (uint32_t)((8UL * pclk) / baudrate);
+    uint32_t div_x64  = div_x128 / 2u;
+
+    /* Extract integer and fractional parts */
+    uint32_t div_int  = div_x64 / 64u;
+    uint32_t div_frac = div_x64 - (div_int * 64u);
+
+    /* Apply rounding correction from x128 calculation */
+    div_frac += (div_x128 - (div_int * 128u)) - (div_frac * 2u);
+
+    if (div_int > (uint32_t)UINT16_MAX)
+        return;
+
+    /* Write 16-bit divisor: set DLAB, write high/low bytes, clear DLAB */
+    MMUART_LCR(DEBUG_UART_BASE) |= DLAB_MASK;
+    MMUART_DMR(DEBUG_UART_BASE) = (uint8_t)(div_int >> 8);
+    MMUART_DLR(DEBUG_UART_BASE) = (uint8_t)div_int;
+    MMUART_LCR(DEBUG_UART_BASE) &= ~DLAB_MASK;
+
+    /* Enable fractional divisor if integer divisor > 1 */
+    if (div_int > 1u) {
+        MMUART_MM0(DEBUG_UART_BASE) |= EFBR_MASK;
+        MMUART_DFR(DEBUG_UART_BASE) = (uint8_t)div_frac;
+    }
+    else {
+        MMUART_MM0(DEBUG_UART_BASE) &= ~EFBR_MASK;
     }
 }
 
 void uart_init(void)
 {
-    uint32_t baud_rate = 115200;
-    uint32_t line_config = (
-        MSS_UART_DATA_8_BITS |
-        MSS_UART_NO_PARITY |
-        MSS_UART_ONE_STOP_BIT
-    );
-
-    /* Disable LIN mode */
+    /* Disable special modes: LIN, IrDA, SmartCard */
     MMUART_MM0(DEBUG_UART_BASE) &= ~ELIN_MASK;
-
-    /* Disable IrDA mode */
     MMUART_MM1(DEBUG_UART_BASE) &= ~EIRD_MASK;
-
-    /* Disable SmartCard Mode */
     MMUART_MM2(DEBUG_UART_BASE) &= ~EERR_MASK;
 
-    /* disable interrupts */
+    /* Disable interrupts */
     MMUART_IER(DEBUG_UART_BASE) = 0u;
 
-    /* FIFO configuration */
+    /* Reset and configure FIFOs, enable RXRDYN/TXRDYN pins */
     MMUART_FCR(DEBUG_UART_BASE) = 0u;
-
-    /* clear receiver FIFO */
-    MMUART_FCR(DEBUG_UART_BASE) |= CLEAR_RX_FIFO_MASK;
-
-    /* clear transmitter FIFO */
-    MMUART_FCR(DEBUG_UART_BASE) |= CLEAR_TX_FIFO_MASK;
-
-    /* set default READY mode : Mode 0*/
-    /* enable RXRDYN and TXRDYN pins. The earlier FCR write to set the TX FIFO
-     * trigger level inadvertently disabled the FCR_RXRDY_TXRDYN_EN bit. */
+    MMUART_FCR(DEBUG_UART_BASE) |= CLEAR_RX_FIFO_MASK | CLEAR_TX_FIFO_MASK;
     MMUART_FCR(DEBUG_UART_BASE) |= RXRDY_TXRDYN_EN_MASK;
 
-    /* disable loopback : local * remote */
-    MMUART_MCR(DEBUG_UART_BASE) &= ~LOOP_MASK;
-
-    MMUART_MCR(DEBUG_UART_BASE) &= ~RLOOP_MASK;
-
-    /* set default TX endian */
-    MMUART_MM1(DEBUG_UART_BASE) &= ~E_MSB_TX_MASK;
+    /* Disable loopback (local and remote) */
+    MMUART_MCR(DEBUG_UART_BASE) &= ~(LOOP_MASK | RLOOP_MASK);
 
-    /* set default RX endian */
-    MMUART_MM1(DEBUG_UART_BASE) &= ~E_MSB_RX_MASK;
+    /* Set LSB-first for TX/RX */
+    MMUART_MM1(DEBUG_UART_BASE) &= ~(E_MSB_TX_MASK | E_MSB_RX_MASK);
 
-    /* default AFM : disabled */
-    MMUART_MM2(DEBUG_UART_BASE) &= ~EAFM_MASK;
+    /* Disable AFM, single wire mode */
+    MMUART_MM2(DEBUG_UART_BASE) &= ~(EAFM_MASK | ESWM_MASK);
 
-    /* disable TX time guard */
-    MMUART_MM0(DEBUG_UART_BASE) &= ~ETTG_MASK;
+    /* Disable TX time guard, RX timeout, fractional baud */
+    MMUART_MM0(DEBUG_UART_BASE) &= ~(ETTG_MASK | ERTO_MASK | EFBR_MASK);
 
-    /* set default RX timeout */
-    MMUART_MM0(DEBUG_UART_BASE) &= ~ERTO_MASK;
-
-    /* disable fractional baud-rate */
-    MMUART_MM0(DEBUG_UART_BASE) &= ~EFBR_MASK;
-
-    /* disable single wire mode */
-    MMUART_MM2(DEBUG_UART_BASE) &= ~ESWM_MASK;
-
-    /* set filter to minimum value */
+    /* Clear timing registers */
     MMUART_GFR(DEBUG_UART_BASE) = 0u;
-
-    /* set default TX time guard */
     MMUART_TTG(DEBUG_UART_BASE) = 0u;
-
-    /* set default RX timeout */
     MMUART_RTO(DEBUG_UART_BASE) = 0u;
 
-    /*
-     * Configure baud rate divisors. This uses the fractional baud rate divisor
-     * where possible to provide the most accurate baud rat possible.
-     */
-    config_baud_divisors(baud_rate);
-
-    /* set the line control register (bit length, stop bits, parity) */
-    MMUART_LCR(DEBUG_UART_BASE) = line_config;
+    /* Configure baud rate (115200) */
+    uart_config_clk(115200);
 
+    /* Set line config: 8N1 */
+    MMUART_LCR(DEBUG_UART_BASE) = MSS_UART_DATA_8_BITS |
+                                  MSS_UART_NO_PARITY |
+                                  MSS_UART_ONE_STOP_BIT;
 }
 
 void uart_write(const char* buf, unsigned int sz)

hal/mpfs250.h

@@ -48,11 +48,11 @@
 #define CSR_MIMPID       0xf13
 #define CSR_MHARTID      0xf14
 
-/* default entry point */
+/* Initial stack pointer address (stack grows downward from here) */
 #ifdef WOLFBOOT_RISCV_SMODE
-#define SYS_INIT_SP_ADDR 0x80200000
+#define WOLFBOOT_STACK_TOP 0x80200000
 #else
-#define SYS_INIT_SP_ADDR 0x80000000
+#define WOLFBOOT_STACK_TOP 0x80000000
 #endif
 
 #ifdef WOLFBOOT_RISCV_SMODE

src/boot_riscv64.c

@@ -42,36 +42,25 @@ extern uint64_t  _end_bss;
 extern uint64_t  _end_stack;
 extern uint64_t  _start_heap;
 extern uint64_t  _global_pointer;
-extern void (* const IV[])(void);
+extern void (* const trap_vector_table[])(void);
 
-extern void main(void);
+/* reloc_trap_vector is implemented in boot_riscv64_start.S */
+extern void reloc_trap_vector(const uint32_t *address);
 
 unsigned long handle_trap(unsigned long cause, unsigned long epc, unsigned long tval)
 {
     /* TODO: Implement trap handling */
     return epc;
 }
 
-void trap_from_machine_mode(uintptr_t * regs, uintptr_t dummy, uintptr_t mepc)
-{
-    /* TODO: Implement trap from machine mode */
-}
-
-void RAMFUNCTION reloc_iv(const uint32_t *address)
-{
-    /* Set machine trap vector to address */
-    asm volatile("csrw mtvec, %0":: "r"(address + 1));
-}
-
-
 #ifdef MMU
 void do_boot(const uint32_t *app_offset, const uint32_t* dts_offset)
 #else
 void do_boot(const uint32_t *app_offset)
 #endif
 {
-    /* Relocate interrupt vector to application */
-    reloc_iv(app_offset);
+    /* Relocate trap vector table to application */
+    reloc_trap_vector(app_offset);
 
     /* Jump to application entry point */
     asm volatile("jr %0":: "r"((uint8_t *)(app_offset)));