Skip to content

Commit f9fd9fe

Browse files
committed
Add config options for stm32f4 boards
This introduces the following configuration options to allow for easier support for boards using the stm32f4 MCU CLOCK_SPEED: This defines the clock speed in Hz STM32_PLLM: This defines the PLLM parameter in the pll clock setup STM32_PLLN: This defines the PLLN parameter in the pll clock setup STM32_PLLP: This defines the PLLP parameter in the pll clock setup STM32_PLLQ: This defines the PLLQ parameter in the pll clock setup
1 parent 374d605 commit f9fd9fe

File tree

1 file changed

+28
-0
lines changed

1 file changed

+28
-0
lines changed

options.mk

Lines changed: 28 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -948,3 +948,31 @@ ifneq ($(CERT_CHAIN_VERIFY),)
948948
endif
949949
SIGN_OPTIONS += --cert-chain $(CERT_CHAIN_FILE)
950950
endif
951+
952+
# Clock Speed (Hz)
953+
ifneq ($(CLOCK_SPEED),)
954+
CFLAGS += -DCLOCK_SPEED=$(CLOCK_SPEED)
955+
endif
956+
957+
# STM32F4 clock options
958+
ifneq ($(STM32_PLLM),)
959+
CFLAGS += -DSTM32_PLLM=$(STM32_PLLM)
960+
endif
961+
ifneq ($(STM32_PLLN),)
962+
CFLAGS += -DSTM32_PLLN=$(STM32_PLLN)
963+
endif
964+
ifneq ($(STM32_PLLP),)
965+
CFLAGS += -DSTM32_PLLP=$(STM32_PLLP)
966+
endif
967+
ifneq ($(STM32_PLLQ),)
968+
CFLAGS += -DSTM32_PLLQ=$(STM32_PLLQ)
969+
endif
970+
971+
# STM32 UART options
972+
ifeq ($(USE_UART1),1)
973+
CFLAGS += -DUSE_UART1=1
974+
endif
975+
976+
ifeq ($(USE_UART3),1)
977+
CFLAGS += -DUSE_UART3=1
978+
endif

0 commit comments

Comments
 (0)