Merge pull request #368 from gojimmypi/espressif-spi

Add Espressif SPI support

Author: dgarske

IDE/Espressif/components/wolfssl/README.md

@@ -0,0 +1,20 @@
+# wolfSSL as a Component in wolfTPM
+
+This directory for wolfSSL is built-in to this wolfTPM example.
+
+## Update
+
+To update this component to the latest wolfSSL component, see the template reference example:
+
+https://github.com/wolfSSL/wolfssl/tree/master/IDE/Espressif/ESP-IDF/examples/template
+
+Copy the entire [components/wolfssl](https://github.com/wolfSSL/wolfssl/tree/master/IDE/Espressif/ESP-IDF/examples/template/components/wolfssl) here.
+
+## Managed Component
+
+To use a managed component, delete this `[project]/components/wolfssl` directory and use
+the Espressif Managed Component install.
+
+See blog for more information:
+
+https://www.wolfssl.com/wolfssl-now-available-in-espressif-component-registry/

IDE/Espressif/components/wolfssl/include/user_settings.h

@@ -55,6 +55,10 @@
     #define WOLFSSL_SHA3
 #endif
 
+#define WOLFTPM_ADV_IO
+#define WOLFTPM_EXAMPLE_HAL
+#define WOLFTPM_INCLUDE_IO_FILE
+
 /*
  * ONE of these Espressif chip families will be detected from sdkconfig:
  *
@@ -146,7 +150,7 @@
 #else
     #define HAVE_ECC
     #define HAVE_CURVE25519
-    #define CURVE25519_SMALL
+    /* #define CURVE25519_SMALL */
 #endif
 
 #define HAVE_ED25519
@@ -643,7 +647,7 @@ Turn on timer debugging (used when CPU cycles not available)
 
 /* Choices are I2C or SPI*/
 /* WOLFTPM_I2C or not; when not defined, assumes SPI. */
-#define WOLFTPM_I2C
+/* #define WOLFTPM_I2C */
 
 /* Enable the wolfTPM example HAL in tpm_io.h */
 #define WOLFTPM_EXAMPLE_HAL
@@ -652,8 +656,10 @@ Turn on timer debugging (used when CPU cycles not available)
 #define WOLFTPM_INCLUDE_IO_FILE
 
 /* The default TPM_TIMEOUT_TRIES is 1,000,000 but can be overridden.
- * A value of 10000 is much more appropriate for the ESP32: */
-#define TPM_TIMEOUT_TRIES 10000
+ * A value of 10000 is much more appropriate for the ESP32.
+ * The extra long delay is for TPM2_CreatePrimary: Endorsement operations,
+ * which can take up to 60 seconds */
+#define TPM_TIMEOUT_TRIES 300000
 
 /* If not defined here, TPM_I2C_TRIES is set to a default value of 10 */
 /* #define TPM_I2C_TRIES 10 */

IDE/Espressif/main/main.c

@@ -55,13 +55,30 @@
     #define WOLFTPM_MAIN_TEST_ITERATIONS 1
 #endif
 
+/* I2C tested with 35840 stack, SPI with 45840 on ESP32-C6 */
+#define MIN_TPM_TEST_STACK_SIZE 45840
+
 static const char* const TAG = "wolfTPM main";
 
 void app_main(void)
 {
     char mydata[1024];
     int tests = WOLFTPM_MAIN_TEST_ITERATIONS;
     esp_err_t ret = 0;
+#ifdef CONFIG_MAIN_TASK_STACK_SIZE
+    if (CONFIG_MAIN_TASK_STACK_SIZE < MIN_TPM_TEST_STACK_SIZE) {
+        ESP_LOGE(TAG, "Stack may be too small!");
+    }
+#else
+    ESP_LOGE(TAG, "No CONFIG_MAIN_TASK_STACK_SIZE defined?");
+#endif
+#ifdef CONFIG_ESP_MAIN_TASK_STACK_SIZE
+    if (CONFIG_ESP_MAIN_TASK_STACK_SIZE < MIN_TPM_TEST_STACK_SIZE) {
+        ESP_LOGE(TAG, "Stack may be too small!");
+    }
+#else
+    ESP_LOGE(TAG, "No CONFIG_ESP_MAIN_TASK_STACK_SIZE defined?");
+#endif
 
 #ifdef LIBWOLFTPM_VERSION_STRING
     ESP_LOGI(TAG, "Hello wolfTPM version %s!", LIBWOLFTPM_VERSION_STRING);

IDE/Espressif/sdkconfig.defaults

@@ -6,10 +6,10 @@ CONFIG_ESP32_DEFAULT_CPU_FREQ_240=y
 #
 # This is typically way bigger than needed for stack size. See user_settings.h
 #
-CONFIG_ESP_MAIN_TASK_STACK_SIZE=35840
+CONFIG_ESP_MAIN_TASK_STACK_SIZE=45840
 
 # Legacy stack size for older ESP-IDF versions
-CONFIG_MAIN_TASK_STACK_SIZE=35840
+CONFIG_MAIN_TASK_STACK_SIZE=45840
 
 #
 # Compiler options

hal/tpm_io.c

@@ -103,6 +103,8 @@ static int TPM2_IoCb_SPI(TPM2_CTX* ctx, const byte* txBuf, byte* rxBuf,
     ret = TPM2_IoCb_Infineon_TriCore_SPI(ctx, txBuf, rxBuf, xferSz, userCtx);
 #elif defined(WOLFTPM_MICROCHIP_HARMONY)
     ret = TPM2_IoCb_Microchip_SPI(ctx, txBuf, rxBuf, xferSz, userCtx);
+#elif defined(WOLFSSL_ESPIDF)
+    ret = TPM2_IoCb_Espressif_SPI(ctx, txBuf, rxBuf, xferSz, userCtx);
 #else
 
     /* TODO: Add your platform here for HW SPI interface */

hal/tpm_io_espressif.c

@@ -42,6 +42,8 @@
 
 /* Espressif */
 #include "sdkconfig.h"
+#include <driver/gpio.h>
+#include <driver/spi_master.h>
 
 #define TAG "TPM_IO"
 
@@ -165,7 +167,7 @@
     #define TPM_I2C_TRIES           10
 #endif
 
-static int _is_initialized_i2c =    FALSE;
+static int _is_initialized_i2c =    0;
 
 #ifdef DEBUG_WOLFSSL_VERBOSE
 static esp_err_t show_binary(byte* theVar, size_t dataSz) {
@@ -238,7 +240,7 @@ static esp_err_t i2c_master_delete(void)
 {
     ESP_LOGI(TAG, "i2c_master_delete");
     ESP_ERROR_CHECK(i2c_driver_delete(I2C_MASTER_NUM));
-    _is_initialized_i2c = FALSE;
+    _is_initialized_i2c = 0;
     return ESP_OK;
 }
 
@@ -438,20 +440,209 @@ int TPM2_IoCb_Espressif_I2C(TPM2_CTX* ctx, int isRead, word32 addr,
 /* end WOLFTPM_I2C */
 
 #else /* If not I2C, it must be SPI  */
-    /* TODO implement SPI */
+/*---------------------------------------------------------------------------*/
 
-    #ifndef TPM2_SPI_HZ
-        /* Use the max speed by default
-         * See tpm2_types.h for chip specific max values */
-        #define TPM2_SPI_HZ TPM2_SPI_MAX_HZ
+/* Note: If an error is encountered during SPI transfer:
+ *    TPM2_StartAuthSession failed 0x903: TPM_RC_SESSION_MEMORY
+ * Try hardware reset of the TPM device.  */
+
+#define SPI_CLOCK_MHZ (10 * 1000 * 1000) /* 10MHz, but tested up to 22MHz */
+
+/* If failures are encountered, try hardware reset of TPM device. */
+#if defined(CONFIG_IDF_TARGET_ESP32S3)
+    #ifndef ESP_SPI_MAX_TRANSFER
+        #define ESP_SPI_MAX_TRANSFER_SIZE MAX_SPI_FRAMESIZE + 4
+    #endif
+    /* FSPI (HOST_SPI2) on esp32-s3-wroom */
+    #ifndef PIN_NUM_MISO
+        #define PIN_NUM_MISO 13
+    #endif
+    #ifndef PIN_NUM_MOSI
+        #define PIN_NUM_MOSI 11
+    #endif
+    #ifndef PIN_NUM_CLK
+        #define PIN_NUM_CLK  12
+    #endif
+    #ifndef PIN_NUM_CS
+        #define PIN_NUM_CS   10
+    #endif
+#elif defined(CONFIG_IDF_TARGET_ESP32C6)
+    #ifndef ESP_SPI_MAX_TRANSFER
+        #define ESP_SPI_MAX_TRANSFER_SIZE 1024
+    #endif
+    #ifndef PIN_NUM_MISO
+        #define PIN_NUM_MISO 2
+    #endif
+    #ifndef PIN_NUM_MOSI
+        #define PIN_NUM_MOSI 7
+    #endif
+    #ifndef PIN_NUM_CLK
+        #define PIN_NUM_CLK  6
+    #endif
+    #ifndef PIN_NUM_CS
+        /* Set to 10 on ESP32-C6 despite documentation that states 16
+         * Tested on ESP32-C6-DevKitC-1 */
+        #define PIN_NUM_CS   10
+        /* Allow software control */
+        #define PIN_NUM_SPICS_IO -1
+    #endif
+#else
+    #ifndef ESP_SPI_MAX_TRANSFER
+        #define ESP_SPI_MAX_TRANSFER_SIZE MAX_SPI_FRAMESIZE
+    #endif
+    #ifndef PIN_NUM_MISO
+        #error PIN_NUM_MISO undefined
     #endif
-    #ifdef WOLFTPM_CHECK_WAIT_STATE
-        #error SPI check wait state logic not supported
+    #ifndef PIN_NUM_MOSI
+        #error PIN_NUM_MOSI undefined
     #endif
+    #ifndef PIN_NUM_CLK
+        #error PIN_NUM_CLK undefined
+    #endif
+    #ifndef PIN_NUM_CS
+        #error PIN_NUM_CS undefined
+    #endif
+#endif
 
-    #error TPM2 SPI support on this platform not supported yet
+/* Set spi_device_interface_config_t.spics_io_num = PIN_NUM_SPICS_IO
+ *     to -1 to let software control.
+ *     to CS Pin = PIN_NUM_CS for hardware control.
+ * See tpm_spi_acquire() and tpm_spi_release()
+ * Software control still requires CS pin  */
+#ifndef PIN_NUM_SPICS_IO
+    #define PIN_NUM_SPICS_IO PIN_NUM_CS
 #endif
 
+/* TPM data storing SPI handles & timeouts */
+static struct TPM_DATA {
+    spi_device_handle_t spi;
+    gpio_num_t cs_pin;
+    int64_t timeout_expiry;
+} *tpm_data;
+
+static int _is_initialized_spi =    0;
+
+static int esp_spi_master_init(void)
+{
+    /* SPI bus & device configuration */
+    const spi_bus_config_t bus_cfg = {
+        .miso_io_num = PIN_NUM_MISO,
+        .mosi_io_num = PIN_NUM_MOSI,
+        .sclk_io_num = PIN_NUM_CLK,
+        .quadwp_io_num = -1,
+        .quadhd_io_num = -1,
+        .max_transfer_sz = ESP_SPI_MAX_TRANSFER_SIZE
+    };
+    const spi_device_interface_config_t dev_cfg = {
+        .clock_speed_hz = SPI_CLOCK_MHZ,
+        .mode = 0,
+        .spics_io_num = PIN_NUM_SPICS_IO, /* -1 for SW or PIN_NUM_CS */
+        .queue_size = 1,
+        .pre_cb = NULL,
+        .post_cb = NULL,
+    };
+    esp_err_t ret;
+
+    /* Initializing CS pin */
+    esp_rom_gpio_pad_select_gpio(PIN_NUM_CS);
+    gpio_set_direction(PIN_NUM_CS, GPIO_MODE_OUTPUT);
+    gpio_set_level(PIN_NUM_CS, 1);
+
+    /* Initialize the SPI bus and device */
+    ret = spi_bus_initialize(SPI2_HOST, &bus_cfg, 0);
+    ESP_ERROR_CHECK(ret);
+
+    /* Attach the device to the SPI bus */
+    spi_device_handle_t spi;
+    ret = spi_bus_add_device(SPI2_HOST, &dev_cfg, &spi);
+    ESP_ERROR_CHECK(ret);
+
+    tpm_data = malloc(sizeof(struct TPM_DATA));
+    tpm_data->spi = spi;
+    tpm_data->cs_pin = PIN_NUM_CS;
+    tpm_data->timeout_expiry = 0;
+
+    _is_initialized_spi = TRUE;
+    return 0;
+}
+
+/* Aquire SPI bus and keep pulling CS */
+static int tpm_spi_acquire(void)
+{
+    int ret;
+    gpio_set_level(tpm_data->cs_pin, 0);
+    ret = spi_device_acquire_bus(tpm_data->spi, portMAX_DELAY);
+    return ret;
+}
+
+/* Release SPI bus and CS */
+int tpm_spi_release (void)
+{
+    gpio_set_level(tpm_data->cs_pin, 1);
+    spi_device_release_bus(tpm_data->spi);
+    return 0;
+}
+
+int tpm_spi_raw_transfer (const byte *data_out, byte *data_in, size_t cnt)
+{
+    spi_transaction_t t;
+    esp_err_t ret;
+
+    /* Maximum transfer size is 64 byte because we don't use DMA. */
+    if (cnt > MAX_SPI_FRAMESIZE + ESP_SPI_ADDITIONAL_FRAME_BUFFER) {
+        ESP_LOGE(TAG, "tpm_io_espressif: cnt %d larger than framesize\n", cnt);
+        return -1;
+    }
+
+    /* At least one of the buffers has to be set. */
+    if (data_out == NULL && data_in == NULL) {
+        return -1;
+    }
+
+    /* Setup transaction */
+    memset(&t, 0, sizeof(t));
+    t.length = cnt*8;
+    t.tx_buffer = data_out;
+    t.rx_buffer = data_in;
+
+    /* Transmit */
+    ret = spi_device_polling_transmit(tpm_data->spi, &t);
+    if (ret != ESP_OK) {
+        ESP_LOGE(TAG, "spi_transmit returned error %d\n", ret);
+        return -1;
+    }
+
+    return 0;
+} /* tpm_spi_raw_transfer */
+
+int TPM2_IoCb_Espressif_SPI(TPM2_CTX* ctx, const byte* txBuf, byte* rxBuf,
+                            word16 xferSz, void* userCtx)
+{
+    (void)ctx;
+    int ret = TPM_RC_FAILURE;
+
+    if (_is_initialized_spi) {
+        ret = ESP_OK;
+    }
+    else {
+        ret = esp_spi_master_init(); /* ESP return code, not TPM */
+        ESP_LOGV(TAG, "HAL: Initializing SPI %d", ret);
+    }
+
+    if (ret == ESP_OK) {
+        tpm_spi_acquire();
+        ret = tpm_spi_raw_transfer(txBuf, rxBuf, xferSz);
+        tpm_spi_release();
+    }
+    else {
+        ESP_LOGE(TAG, "SPI Failed to initialize. Error: %d", ret);
+        ret = TPM_RC_FAILURE;
+    }
+
+    return ret;
+} /* TPM2_IoCb_Espressif_SPI */
+
+#endif /* Espressif SPI */
 #endif /* WOLFSSL_ESPIDF */
 #endif /* WOLFTPM_INCLUDE_IO_FILE */
 

src/tpm2_tis.c

@@ -25,7 +25,6 @@
 
 #include <wolftpm/tpm2_tis.h>
 
-
 /******************************************************************************/
 /* --- BEGIN TPM Interface Specification (TIS) Layer */
 /******************************************************************************/
@@ -405,6 +404,7 @@ int TPM2_TIS_GetBurstCount(TPM2_CTX* ctx, word16* burstCount)
     }
     else
 #endif
+
     {
         int timeout = TPM_TIMEOUT_TRIES;
         *burstCount = 0;