Skip to content

Commit 15a34cb

Browse files
SiarheiVolkaujmvalin
authored andcommitted
MIPS: silk: optimize silk_SMLAWB for MIPS32+
MIPS32 has 32x32=>64bit multiplication, although shifting 64-bit result isn't trivial so its worth to shift right 64-bit value to 32 it means just drop LSB register of the result. Since third argument of silk_SMLAWB is 16-bit wide we can shift it left by 16 before multiplication to apply technique above to the result. Signed-off-by: Siarhei Volkau <[email protected]> Signed-off-by: Jean-Marc Valin <[email protected]>
1 parent cc6750e commit 15a34cb

File tree

1 file changed

+9
-0
lines changed

1 file changed

+9
-0
lines changed

silk/mips/macros_mipsr1.h

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -82,6 +82,15 @@ static inline int silk_SMULWB(int a, int b)
8282
return ac >> 32;
8383
}
8484

85+
/* a32 + (b32 * (opus_int32)((opus_int16)(c32))) >> 16 output have to be 32bit int */
86+
#undef silk_SMLAWB
87+
static inline int silk_SMLAWB(int a, int b, int c)
88+
{
89+
long long ac = (long long)b * (int)(c << 16);
90+
91+
return a + (ac >> 32);
92+
}
93+
8594
#endif
8695

8796
#if defined (__mips_isa_rev) /* MIPS32r1+ */

0 commit comments

Comments
 (0)