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SiarheiVolkaujmvalin
SiarheiVolkau
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jmvalin
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MIPS: silk: optimize silk_warped_autocorrelation_FIX for MIPS32+
MIPS32+ can get benefit from same algorithm as used for DSP extension due its multiply-accumulate nature. Signed-off-by: Siarhei Volkau <[email protected]> Signed-off-by: Jean-Marc Valin <[email protected]>
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‎silk/fixed/mips/warped_autocorrelation_FIX_mipsr1.h‎

Lines changed: 47 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -34,14 +34,36 @@ POSSIBILITY OF SUCH DAMAGE.
3434

3535
#include "main_FIX.h"
3636

37+
#if defined (__mips_dsp) && __mips == 32
38+
39+
#define MIPS_MADD __builtin_mips_madd
40+
#define MIPS_SHILO __builtin_mips_shilo
41+
42+
#define OVERRIDE_silk_warped_autocorrelation_FIX_c
43+
44+
#elif defined (__mips_isa_rev) && __mips == 32
45+
46+
static inline long long MIPS_MADD(long long acc, int a, int b) {
47+
return acc + (long long)a * b;
48+
}
49+
50+
static inline long long MIPS_SHILO(long long acc, int sh) {
51+
return (sh >= 0) ? (acc >> sh) : (acc << -sh);
52+
}
53+
54+
#define OVERRIDE_silk_warped_autocorrelation_FIX_c
55+
56+
#endif
57+
58+
/* Autocorrelations for a warped frequency axis */
59+
#if defined (OVERRIDE_silk_warped_autocorrelation_FIX_c)
60+
3761
#undef QC
3862
#define QC 10
3963

4064
#undef QS
4165
#define QS 14
4266

43-
/* Autocorrelations for a warped frequency axis */
44-
#define OVERRIDE_silk_warped_autocorrelation_FIX_c
4567
void silk_warped_autocorrelation_FIX_c(
4668
opus_int32 *corr, /* O Result [order + 1] */
4769
opus_int *scale, /* O Scaling of the correlation vector */
@@ -79,39 +101,39 @@ void silk_warped_autocorrelation_FIX_c(
79101
for( i = 0; i < order; i += 2 ) {
80102
/* Output of allpass section */
81103
tmp2_QS = silk_SMLAWB( state_QS[ i ], state_QS[ i + 1 ] - tmp1_QS, warping_Q16 );
82-
corr_QC[ i ] = __builtin_mips_madd( corr_QC[ i ], tmp1_QS, start_1);
104+
corr_QC[ i ] = MIPS_MADD( corr_QC[ i ], tmp1_QS, start_1);
83105

84106
tmp4_QS = silk_SMLAWB( tmp1_QS, tmp2_QS - tmp3_QS, warping_Q16 );
85-
corr_QC[ i ] = __builtin_mips_madd( corr_QC[ i ], tmp3_QS, start_2);
107+
corr_QC[ i ] = MIPS_MADD( corr_QC[ i ], tmp3_QS, start_2);
86108

87109
tmp6_QS = silk_SMLAWB( tmp3_QS, tmp4_QS - tmp5_QS, warping_Q16 );
88-
corr_QC[ i ] = __builtin_mips_madd( corr_QC[ i ], tmp5_QS, start_3);
110+
corr_QC[ i ] = MIPS_MADD( corr_QC[ i ], tmp5_QS, start_3);
89111

90112
tmp8_QS = silk_SMLAWB( tmp5_QS, tmp6_QS - tmp7_QS, warping_Q16 );
91113
state_QS[ i ] = tmp7_QS;
92-
corr_QC[ i ] = __builtin_mips_madd( corr_QC[ i ], tmp7_QS, state_QS[0]);
114+
corr_QC[ i ] = MIPS_MADD( corr_QC[ i ], tmp7_QS, state_QS[0]);
93115

94116
/* Output of allpass section */
95117
tmp1_QS = silk_SMLAWB( state_QS[ i + 1 ], state_QS[ i + 2 ] - tmp2_QS, warping_Q16 );
96-
corr_QC[ i+1 ] = __builtin_mips_madd( corr_QC[ i+1 ], tmp2_QS, start_1);
118+
corr_QC[ i+1 ] = MIPS_MADD( corr_QC[ i+1 ], tmp2_QS, start_1);
97119

98120
tmp3_QS = silk_SMLAWB( tmp2_QS, tmp1_QS - tmp4_QS, warping_Q16 );
99-
corr_QC[ i+1 ] = __builtin_mips_madd( corr_QC[ i+1 ], tmp4_QS, start_2);
121+
corr_QC[ i+1 ] = MIPS_MADD( corr_QC[ i+1 ], tmp4_QS, start_2);
100122

101123
tmp5_QS = silk_SMLAWB( tmp4_QS, tmp3_QS - tmp6_QS, warping_Q16 );
102-
corr_QC[ i+1 ] = __builtin_mips_madd( corr_QC[ i+1 ], tmp6_QS, start_3);
124+
corr_QC[ i+1 ] = MIPS_MADD( corr_QC[ i+1 ], tmp6_QS, start_3);
103125

104126
tmp7_QS = silk_SMLAWB( tmp6_QS, tmp5_QS - tmp8_QS, warping_Q16 );
105127
state_QS[ i + 1 ] = tmp8_QS;
106-
corr_QC[ i+1 ] = __builtin_mips_madd( corr_QC[ i+1 ], tmp8_QS, state_QS[ 0 ]);
128+
corr_QC[ i+1 ] = MIPS_MADD( corr_QC[ i+1 ], tmp8_QS, state_QS[ 0 ]);
107129

108130
}
109131
state_QS[ order ] = tmp7_QS;
110132

111-
corr_QC[ order ] = __builtin_mips_madd( corr_QC[ order ], tmp1_QS, start_1);
112-
corr_QC[ order ] = __builtin_mips_madd( corr_QC[ order ], tmp3_QS, start_2);
113-
corr_QC[ order ] = __builtin_mips_madd( corr_QC[ order ], tmp5_QS, start_3);
114-
corr_QC[ order ] = __builtin_mips_madd( corr_QC[ order ], tmp7_QS, state_QS[ 0 ]);
133+
corr_QC[ order ] = MIPS_MADD( corr_QC[ order ], tmp1_QS, start_1);
134+
corr_QC[ order ] = MIPS_MADD( corr_QC[ order ], tmp3_QS, start_2);
135+
corr_QC[ order ] = MIPS_MADD( corr_QC[ order ], tmp5_QS, start_3);
136+
corr_QC[ order ] = MIPS_MADD( corr_QC[ order ], tmp7_QS, state_QS[ 0 ]);
115137
}
116138

117139
for(;n< length; n++ ) {
@@ -124,19 +146,19 @@ void silk_warped_autocorrelation_FIX_c(
124146
/* Output of allpass section */
125147
tmp2_QS = silk_SMLAWB( state_QS[ i ], state_QS[ i + 1 ] - tmp1_QS, warping_Q16 );
126148
state_QS[ i ] = tmp1_QS;
127-
corr_QC[ i ] = __builtin_mips_madd( corr_QC[ i ], tmp1_QS, state_QS[ 0 ]);
149+
corr_QC[ i ] = MIPS_MADD( corr_QC[ i ], tmp1_QS, state_QS[ 0 ]);
128150

129151
/* Output of allpass section */
130152
tmp1_QS = silk_SMLAWB( state_QS[ i + 1 ], state_QS[ i + 2 ] - tmp2_QS, warping_Q16 );
131153
state_QS[ i + 1 ] = tmp2_QS;
132-
corr_QC[ i+1 ] = __builtin_mips_madd( corr_QC[ i+1 ], tmp2_QS, state_QS[ 0 ]);
154+
corr_QC[ i+1 ] = MIPS_MADD( corr_QC[ i+1 ], tmp2_QS, state_QS[ 0 ]);
133155
}
134156
state_QS[ order ] = tmp1_QS;
135-
corr_QC[ order ] = __builtin_mips_madd( corr_QC[ order ], tmp1_QS, state_QS[ 0 ]);
157+
corr_QC[ order ] = MIPS_MADD( corr_QC[ order ], tmp1_QS, state_QS[ 0 ]);
136158
}
137159

138160
temp64 = corr_QC[ 0 ];
139-
temp64 = __builtin_mips_shilo(temp64, val);
161+
temp64 = MIPS_SHILO(temp64, val);
140162

141163
lsh = silk_CLZ64( temp64 ) - 35;
142164
lsh = silk_LIMIT( lsh, -12 - QC, 30 - QC );
@@ -145,21 +167,23 @@ void silk_warped_autocorrelation_FIX_c(
145167
if( lsh >= 0 ) {
146168
for( i = 0; i < order + 1; i++ ) {
147169
temp64 = corr_QC[ i ];
148-
//temp64 = __builtin_mips_shilo(temp64, val);
170+
//temp64 = MIPS_SHILO(temp64, val);
149171
temp64 = (val >= 0) ? (temp64 >> val) : (temp64 << -val);
150-
corr[ i ] = (opus_int32)silk_CHECK_FIT32( __builtin_mips_shilo( temp64, -lsh ) );
172+
corr[ i ] = (opus_int32)silk_CHECK_FIT32( MIPS_SHILO( temp64, -lsh ) );
151173
}
152174
} else {
153175
for( i = 0; i < order + 1; i++ ) {
154176
temp64 = corr_QC[ i ];
155-
//temp64 = __builtin_mips_shilo(temp64, val);
177+
//temp64 = MIPS_SHILO(temp64, val);
156178
temp64 = (val >= 0) ? (temp64 >> val) : (temp64 << -val);
157-
corr[ i ] = (opus_int32)silk_CHECK_FIT32( __builtin_mips_shilo( temp64, -lsh ) );
179+
corr[ i ] = (opus_int32)silk_CHECK_FIT32( MIPS_SHILO( temp64, -lsh ) );
158180
}
159181
}
160182

161-
corr_QC[ 0 ] = __builtin_mips_shilo(corr_QC[ 0 ], val);
183+
corr_QC[ 0 ] = MIPS_SHILO(corr_QC[ 0 ], val);
162184

163185
silk_assert( corr_QC[ 0 ] >= 0 ); /* If breaking, decrease QC*/
164186
}
187+
#endif /* OVERRIDE_silk_warped_autocorrelation_FIX_c */
188+
165189
#endif /* __WARPED_AUTOCORRELATION_FIX_MIPSR1_H__ */

‎silk/fixed/warped_autocorrelation_FIX.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@ POSSIBILITY OF SUCH DAMAGE.
3131

3232
#include "main_FIX.h"
3333

34-
#if defined(__mips_dsp) && __mips == 32
34+
#if defined(__mips)
3535
#include "mips/warped_autocorrelation_FIX_mipsr1.h"
3636
#endif
3737

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