Merge pull request #429 from neok-m4700/shadow

JohanMabille · web-flow · commit 10d9617c2316 · 2021-03-15T08:51:42.000+01:00
Rename shadowing variables
diff --git a/include/xsimd/types/xsimd_avx512_int16.hpp b/include/xsimd/types/xsimd_avx512_int16.hpp
@@ -498,7 +498,7 @@ namespace xsimd
         return _mm512_srai_epi16(lhs, rhs);
 #endif
 #else
-        return avx512_detail::shift_impl([](int16_t val, int32_t rhs) { return val >> rhs; }, lhs, rhs);
+        return avx512_detail::shift_impl([](int16_t val, int32_t s) { return val >> s; }, lhs, rhs);
 #endif
     }
 
@@ -507,7 +507,7 @@ namespace xsimd
 #if defined(XSIMD_AVX512BW_AVAILABLE)
         return _mm512_sllv_epi16(lhs, rhs);
 #else
-        return avx512_detail::shift_impl([](int16_t val, int16_t rhs) { return val << rhs; }, lhs, rhs);
+        return avx512_detail::shift_impl([](int16_t val, int16_t s) { return val << s; }, lhs, rhs);
 #endif
     }
 
@@ -516,7 +516,7 @@ namespace xsimd
 #if defined(XSIMD_AVX512BW_AVAILABLE)
         return _mm512_srav_epi16(lhs, rhs);
 #else
-        return avx512_detail::shift_impl([](int16_t val, int16_t rhs) { return val >> rhs; }, lhs, rhs);
+        return avx512_detail::shift_impl([](int16_t val, int16_t s) { return val >> s; }, lhs, rhs);
 #endif
     }
 
@@ -564,7 +564,7 @@ namespace xsimd
 #if defined(XSIMD_AVX512BW_AVAILABLE)
         return _mm512_sllv_epi16(lhs, rhs);
 #else
-        return avx512_detail::shift_impl([](uint16_t val, int16_t rhs) { return val << rhs; }, lhs, rhs);
+        return avx512_detail::shift_impl([](uint16_t val, int16_t s) { return val << s; }, lhs, rhs);
 #endif
     }
 
@@ -573,7 +573,7 @@ namespace xsimd
 #if defined(XSIMD_AVX512BW_AVAILABLE)
         return _mm512_srlv_epi16(lhs, rhs);
 #else
-        return avx512_detail::shift_impl([](uint16_t val, int16_t rhs) { return val >> rhs; }, lhs, rhs);
+        return avx512_detail::shift_impl([](uint16_t val, int16_t s) { return val >> s; }, lhs, rhs);
 #endif
     }
 
diff --git a/include/xsimd/types/xsimd_avx512_int8.hpp b/include/xsimd/types/xsimd_avx512_int8.hpp
@@ -497,18 +497,18 @@ namespace xsimd
 #endif
         return _mm512_or_si512(cmp_sign_mask, _mm512_andnot_si512(sign_mask, res));
 #else
-        return avx512_detail::shift_impl([](int8_t val, int32_t rhs) { return val >> rhs; }, lhs, rhs);
+        return avx512_detail::shift_impl([](int8_t val, int32_t s) { return val >> s; }, lhs, rhs);
 #endif
     }
 
     inline batch<int8_t, 64> operator<<(const batch<int8_t, 64>& lhs, const batch<int8_t, 64>& rhs)
     {
-        return avx512_detail::shift_impl([](int8_t val, int8_t rhs) { return val << rhs; }, lhs, rhs);
+        return avx512_detail::shift_impl([](int8_t val, int8_t s) { return val << s; }, lhs, rhs);
     }
 
     inline batch<int8_t, 64> operator>>(const batch<int8_t, 64>& lhs, const batch<int8_t, 64>& rhs)
     {
-        return avx512_detail::shift_impl([](int8_t val, int8_t rhs) { return val >> rhs; }, lhs, rhs);
+        return avx512_detail::shift_impl([](int8_t val, int8_t s) { return val >> s; }, lhs, rhs);
     }
 
     XSIMD_DEFINE_LOAD_STORE_INT8(int8_t, 64, 64)
@@ -536,12 +536,12 @@ namespace xsimd
 
     inline batch<uint8_t, 64> operator<<(const batch<uint8_t, 64>& lhs, const batch<int8_t, 64>& rhs)
     {
-        return avx512_detail::shift_impl([](uint8_t val, int8_t rhs) { return val << rhs; }, lhs, rhs);
+        return avx512_detail::shift_impl([](uint8_t val, int8_t s) { return val << s; }, lhs, rhs);
     }
 
     inline batch<uint8_t, 64> operator>>(const batch<uint8_t, 64>& lhs, const batch<int8_t, 64>& rhs)
     {
-        return avx512_detail::shift_impl([](uint8_t val, int8_t rhs) { return val >> rhs; }, lhs, rhs);
+        return avx512_detail::shift_impl([](uint8_t val, int8_t s) { return val >> s; }, lhs, rhs);
     }
 
     XSIMD_DEFINE_LOAD_STORE_INT8(uint8_t, 64, 64)
diff --git a/include/xsimd/types/xsimd_avx_int64.hpp b/include/xsimd/types/xsimd_avx_int64.hpp
@@ -500,7 +500,7 @@ namespace xsimd
 #if defined(XSIMD_AVX512VL_AVAILABLE)
         return _mm256_srai_epi64(lhs, rhs);
 #else
-        return avx_detail::shift_impl([](int64_t val, int32_t rhs) { return val >> rhs; }, lhs, rhs);
+        return avx_detail::shift_impl([](int64_t val, int32_t s) { return val >> s; }, lhs, rhs);
 #endif
     }
 
@@ -509,7 +509,7 @@ namespace xsimd
 #if XSIMD_X86_INSTR_SET >= XSIMD_X86_AVX2_VERSION
         return _mm256_sllv_epi64(lhs, rhs);
 #else
-        return avx_detail::shift_impl([](int64_t val, int64_t rhs) { return val << rhs; }, lhs, rhs);
+        return avx_detail::shift_impl([](int64_t val, int64_t s) { return val << s; }, lhs, rhs);
 #endif
     }
 
@@ -518,7 +518,7 @@ namespace xsimd
 #if defined(XSIMD_AVX512VL_AVAILABLE)
         return _mm256_srav_epi64(lhs, rhs);
 #else
-        return avx_detail::shift_impl([](int64_t val, int64_t rhs) { return val >> rhs; }, lhs, rhs);
+        return avx_detail::shift_impl([](int64_t val, int64_t s) { return val >> s; }, lhs, rhs);
 #endif
     }
 
@@ -551,7 +551,7 @@ namespace xsimd
 #if XSIMD_X86_INSTR_SET >= XSIMD_X86_AVX2_VERSION
         return _mm256_sllv_epi64(lhs, rhs);
 #else
-        return avx_detail::shift_impl([](uint64_t val, int64_t rhs) { return val << rhs; }, lhs, rhs);
+        return avx_detail::shift_impl([](uint64_t val, int64_t s) { return val << s; }, lhs, rhs);
 #endif
     }
 
@@ -560,7 +560,7 @@ namespace xsimd
 #if XSIMD_X86_INSTR_SET >= XSIMD_X86_AVX2_VERSION
         return _mm256_srlv_epi64(lhs, rhs);
 #else
-        return avx_detail::shift_impl([](uint64_t val, int64_t rhs) { return val >> rhs; }, lhs, rhs);
+        return avx_detail::shift_impl([](uint64_t val, int64_t s) { return val >> s; }, lhs, rhs);
 #endif
     }
 }
diff --git a/include/xsimd/types/xsimd_avx_int8.hpp b/include/xsimd/types/xsimd_avx_int8.hpp
@@ -410,7 +410,7 @@ namespace xsimd
 #if XSIMD_X86_INSTR_SET >= XSIMD_X86_AVX2_VERSION
         return _mm256_and_si256(_mm256_set1_epi8(0xFF << rhs), _mm256_slli_epi32(lhs, rhs));
 #else
-        return avx_detail::shift_impl([](int8_t val, int32_t rhs) { return val << rhs; }, lhs, rhs);
+        return avx_detail::shift_impl([](int8_t val, int32_t s) { return val << s; }, lhs, rhs);
 #endif
     }
 
@@ -422,18 +422,18 @@ namespace xsimd
         __m256i res = _mm256_srai_epi16(lhs, rhs);
         return _mm256_or_si256(_mm256_and_si256(sign_mask, cmp_is_negative), _mm256_andnot_si256(sign_mask, res));
 #else
-        return avx_detail::shift_impl([](int8_t val, int32_t rhs) { return val >> rhs; }, lhs, rhs);
+        return avx_detail::shift_impl([](int8_t val, int32_t s) { return val >> s; }, lhs, rhs);
 #endif
     }
 
     inline batch<int8_t, 32> operator<<(const batch<int8_t, 32>& lhs, const batch<int8_t, 32>& rhs)
     {
-        return avx_detail::shift_impl([](int8_t val, int8_t rhs) { return val << rhs; }, lhs, rhs);
+        return avx_detail::shift_impl([](int8_t val, int8_t s) { return val << s; }, lhs, rhs);
     }
 
     inline batch<int8_t, 32> operator>>(const batch<int8_t, 32>& lhs, const batch<int8_t, 32>& rhs)
     {
-        return avx_detail::shift_impl([](int8_t val, int8_t rhs) { return val >> rhs; }, lhs, rhs);
+        return avx_detail::shift_impl([](int8_t val, int8_t s) { return val >> s; }, lhs, rhs);
     }
 
     XSIMD_DEFINE_LOAD_STORE_INT8(int8_t, 32, 32)
@@ -444,7 +444,7 @@ namespace xsimd
 #if XSIMD_X86_INSTR_SET >= XSIMD_X86_AVX2_VERSION
         return _mm256_and_si256(_mm256_set1_epi8(0xFF << rhs), _mm256_slli_epi32(lhs, rhs));
 #else
-        return avx_detail::shift_impl([](int8_t val, int32_t rhs) { return val << rhs; }, lhs, rhs);
+        return avx_detail::shift_impl([](int8_t val, int32_t s) { return val << s; }, lhs, rhs);
 #endif
     }
 
@@ -453,18 +453,18 @@ namespace xsimd
 #if XSIMD_X86_INSTR_SET >= XSIMD_X86_AVX2_VERSION
         return _mm256_and_si256(_mm256_set1_epi8(0xFF >> rhs), _mm256_srli_epi32(lhs, rhs));
 #else
-        return avx_detail::shift_impl([](uint8_t val, int32_t rhs) { return val >> rhs; }, lhs, rhs);
+        return avx_detail::shift_impl([](uint8_t val, int32_t s) { return val >> s; }, lhs, rhs);
 #endif
     }
 
     inline batch<uint8_t, 32> operator<<(const batch<uint8_t, 32>& lhs, const batch<int8_t, 32>& rhs)
     {
-        return avx_detail::shift_impl([](uint8_t val, int8_t rhs) { return val << rhs; }, lhs, rhs);
+        return avx_detail::shift_impl([](uint8_t val, int8_t s) { return val << s; }, lhs, rhs);
     }
 
     inline batch<uint8_t, 32> operator>>(const batch<uint8_t, 32>& lhs, const batch<int8_t, 32>& rhs)
     {
-        return avx_detail::shift_impl([](uint8_t val, int8_t rhs) { return val >> rhs; }, lhs, rhs);
+        return avx_detail::shift_impl([](uint8_t val, int8_t s) { return val >> s; }, lhs, rhs);
     }
 
     XSIMD_DEFINE_LOAD_STORE_INT8(uint8_t, 32, 32)

Original file line number	Diff line number	Diff line change
`@@ -497,18 +497,18 @@ namespace xsimd`
`497`	`497`	`#endif`
`498`	`498`	`return _mm512_or_si512(cmp_sign_mask, _mm512_andnot_si512(sign_mask, res));`
`499`	`499`	`#else`
`500`		`- return avx512_detail::shift_impl([](int8_t val, int32_t rhs) { return val >> rhs; }, lhs, rhs);`
	`500`	`+ return avx512_detail::shift_impl([](int8_t val, int32_t s) { return val >> s; }, lhs, rhs);`
`501`	`501`	`#endif`
`502`	`502`	`}`
`503`	`503`
`504`	`504`	`inline batch<int8_t, 64> operator<<(const batch<int8_t, 64>& lhs, const batch<int8_t, 64>& rhs)`
`505`	`505`	`{`
`506`		`- return avx512_detail::shift_impl([](int8_t val, int8_t rhs) { return val << rhs; }, lhs, rhs);`
	`506`	`+ return avx512_detail::shift_impl([](int8_t val, int8_t s) { return val << s; }, lhs, rhs);`
`507`	`507`	`}`
`508`	`508`
`509`	`509`	`inline batch<int8_t, 64> operator>>(const batch<int8_t, 64>& lhs, const batch<int8_t, 64>& rhs)`
`510`	`510`	`{`
`511`		`- return avx512_detail::shift_impl([](int8_t val, int8_t rhs) { return val >> rhs; }, lhs, rhs);`
	`511`	`+ return avx512_detail::shift_impl([](int8_t val, int8_t s) { return val >> s; }, lhs, rhs);`
`512`	`512`	`}`
`513`	`513`
`514`	`514`	`XSIMD_DEFINE_LOAD_STORE_INT8(int8_t, 64, 64)`
`@@ -536,12 +536,12 @@ namespace xsimd`
`536`	`536`
`537`	`537`	`inline batch<uint8_t, 64> operator<<(const batch<uint8_t, 64>& lhs, const batch<int8_t, 64>& rhs)`
`538`	`538`	`{`
`539`		`- return avx512_detail::shift_impl([](uint8_t val, int8_t rhs) { return val << rhs; }, lhs, rhs);`
	`539`	`+ return avx512_detail::shift_impl([](uint8_t val, int8_t s) { return val << s; }, lhs, rhs);`
`540`	`540`	`}`
`541`	`541`
`542`	`542`	`inline batch<uint8_t, 64> operator>>(const batch<uint8_t, 64>& lhs, const batch<int8_t, 64>& rhs)`
`543`	`543`	`{`
`544`		`- return avx512_detail::shift_impl([](uint8_t val, int8_t rhs) { return val >> rhs; }, lhs, rhs);`
	`544`	`+ return avx512_detail::shift_impl([](uint8_t val, int8_t s) { return val >> s; }, lhs, rhs);`
`545`	`545`	`}`
`546`	`546`
`547`	`547`	`XSIMD_DEFINE_LOAD_STORE_INT8(uint8_t, 64, 64)`
Original file line number	Diff line number	Diff line change
`@@ -410,7 +410,7 @@ namespace xsimd`
`410`	`410`	`#if XSIMD_X86_INSTR_SET >= XSIMD_X86_AVX2_VERSION`
`411`	`411`	`return _mm256_and_si256(_mm256_set1_epi8(0xFF << rhs), _mm256_slli_epi32(lhs, rhs));`
`412`	`412`	`#else`
`413`		`- return avx_detail::shift_impl([](int8_t val, int32_t rhs) { return val << rhs; }, lhs, rhs);`
	`413`	`+ return avx_detail::shift_impl([](int8_t val, int32_t s) { return val << s; }, lhs, rhs);`
`414`	`414`	`#endif`
`415`	`415`	`}`
`416`	`416`
`@@ -422,18 +422,18 @@ namespace xsimd`
`422`	`422`	`__m256i res = _mm256_srai_epi16(lhs, rhs);`
`423`	`423`	`return _mm256_or_si256(_mm256_and_si256(sign_mask, cmp_is_negative), _mm256_andnot_si256(sign_mask, res));`
`424`	`424`	`#else`
`425`		`- return avx_detail::shift_impl([](int8_t val, int32_t rhs) { return val >> rhs; }, lhs, rhs);`
	`425`	`+ return avx_detail::shift_impl([](int8_t val, int32_t s) { return val >> s; }, lhs, rhs);`
`426`	`426`	`#endif`
`427`	`427`	`}`
`428`	`428`
`429`	`429`	`inline batch<int8_t, 32> operator<<(const batch<int8_t, 32>& lhs, const batch<int8_t, 32>& rhs)`
`430`	`430`	`{`
`431`		`- return avx_detail::shift_impl([](int8_t val, int8_t rhs) { return val << rhs; }, lhs, rhs);`
	`431`	`+ return avx_detail::shift_impl([](int8_t val, int8_t s) { return val << s; }, lhs, rhs);`
`432`	`432`	`}`
`433`	`433`
`434`	`434`	`inline batch<int8_t, 32> operator>>(const batch<int8_t, 32>& lhs, const batch<int8_t, 32>& rhs)`
`435`	`435`	`{`
`436`		`- return avx_detail::shift_impl([](int8_t val, int8_t rhs) { return val >> rhs; }, lhs, rhs);`
	`436`	`+ return avx_detail::shift_impl([](int8_t val, int8_t s) { return val >> s; }, lhs, rhs);`
`437`	`437`	`}`
`438`	`438`
`439`	`439`	`XSIMD_DEFINE_LOAD_STORE_INT8(int8_t, 32, 32)`
`@@ -444,7 +444,7 @@ namespace xsimd`
`444`	`444`	`#if XSIMD_X86_INSTR_SET >= XSIMD_X86_AVX2_VERSION`
`445`	`445`	`return _mm256_and_si256(_mm256_set1_epi8(0xFF << rhs), _mm256_slli_epi32(lhs, rhs));`
`446`	`446`	`#else`
`447`		`- return avx_detail::shift_impl([](int8_t val, int32_t rhs) { return val << rhs; }, lhs, rhs);`
	`447`	`+ return avx_detail::shift_impl([](int8_t val, int32_t s) { return val << s; }, lhs, rhs);`
`448`	`448`	`#endif`
`449`	`449`	`}`
`450`	`450`
`@@ -453,18 +453,18 @@ namespace xsimd`
`453`	`453`	`#if XSIMD_X86_INSTR_SET >= XSIMD_X86_AVX2_VERSION`
`454`	`454`	`return _mm256_and_si256(_mm256_set1_epi8(0xFF >> rhs), _mm256_srli_epi32(lhs, rhs));`
`455`	`455`	`#else`
`456`		`- return avx_detail::shift_impl([](uint8_t val, int32_t rhs) { return val >> rhs; }, lhs, rhs);`
	`456`	`+ return avx_detail::shift_impl([](uint8_t val, int32_t s) { return val >> s; }, lhs, rhs);`
`457`	`457`	`#endif`
`458`	`458`	`}`
`459`	`459`
`460`	`460`	`inline batch<uint8_t, 32> operator<<(const batch<uint8_t, 32>& lhs, const batch<int8_t, 32>& rhs)`
`461`	`461`	`{`
`462`		`- return avx_detail::shift_impl([](uint8_t val, int8_t rhs) { return val << rhs; }, lhs, rhs);`
	`462`	`+ return avx_detail::shift_impl([](uint8_t val, int8_t s) { return val << s; }, lhs, rhs);`
`463`	`463`	`}`
`464`	`464`
`465`	`465`	`inline batch<uint8_t, 32> operator>>(const batch<uint8_t, 32>& lhs, const batch<int8_t, 32>& rhs)`
`466`	`466`	`{`
`467`		`- return avx_detail::shift_impl([](uint8_t val, int8_t rhs) { return val >> rhs; }, lhs, rhs);`
	`467`	`+ return avx_detail::shift_impl([](uint8_t val, int8_t s) { return val >> s; }, lhs, rhs);`
`468`	`468`	`}`
`469`	`469`
`470`	`470`	`XSIMD_DEFINE_LOAD_STORE_INT8(uint8_t, 32, 32)`