@@ -1142,6 +1142,39 @@ namespace xsimd
11421142 }
11431143
11441144 // swizzle (constant mask)
1145+ template <
1146+ class A , typename T,
1147+ uint8_t V0, uint8_t V1, uint8_t V2, uint8_t V3, uint8_t V4, uint8_t V5, uint8_t V6, uint8_t V7,
1148+ uint8_t V8, uint8_t V9, uint8_t V10, uint8_t V11, uint8_t V12, uint8_t V13, uint8_t V14, uint8_t V15,
1149+ uint8_t V16, uint8_t V17, uint8_t V18, uint8_t V19, uint8_t V20, uint8_t V21, uint8_t V22, uint8_t V23,
1150+ uint8_t V24, uint8_t V25, uint8_t V26, uint8_t V27, uint8_t V28, uint8_t V29, uint8_t V30, uint8_t V31,
1151+ detail::enable_sized_t <T, 1 > = 0 >
1152+ XSIMD_INLINE batch<T, A> swizzle (
1153+ batch<T, A> const & self,
1154+ batch_constant<
1155+ uint8_t , A,
1156+ V0, V1, V2, V3, V4, V5, V6, V7, V8, V9, V10, V11, V12, V13, V14, V15,
1157+ V16, V17, V18, V19, V20, V21, V22, V23, V24, V25, V26, V27, V28, V29, V30, V31>
1158+ mask,
1159+ requires_arch<avx2> req) noexcept
1160+ {
1161+ return swizzle (self, mask.as_batch (), req);
1162+ }
1163+
1164+ template <
1165+ class A , typename T,
1166+ uint16_t V0, uint16_t V1, uint16_t V2, uint16_t V3, uint16_t V4, uint16_t V5, uint16_t V6, uint16_t V7,
1167+ uint16_t V8, uint16_t V9, uint16_t V10, uint16_t V11, uint16_t V12, uint16_t V13, uint16_t V14, uint16_t V15,
1168+ detail::enable_sized_t <T, 2 > = 0 >
1169+ XSIMD_INLINE batch<T, A> swizzle (
1170+ batch<T, A> const & self,
1171+ batch_constant<uint16_t , A, V0, V1, V2, V3, V4, V5, V6, V7, V8, V9, V10, V11, V12, V13, V14, V15>
1172+ mask,
1173+ requires_arch<avx2> req) noexcept
1174+ {
1175+ return swizzle (self, mask.as_batch (), req);
1176+ }
1177+
11451178 template <class A , uint32_t V0, uint32_t V1, uint32_t V2, uint32_t V3, uint32_t V4, uint32_t V5, uint32_t V6, uint32_t V7>
11461179 XSIMD_INLINE batch<float , A> swizzle (batch<float , A> const & self, batch_constant<uint32_t , A, V0, V1, V2, V3, V4, V5, V6, V7> mask, requires_arch<avx2>) noexcept
11471180 {
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