WIP

Author: serge-sans-paille

include/xsimd/arch/xsimd_altivec.hpp

@@ -1115,25 +1115,15 @@ namespace xsimd
         {
             return _mm_min_pd(self, other);
         }
+#endif
 
         // mul
-        template <class A>
-        XSIMD_INLINE batch<float, A> mul(batch<float, A> const& self, batch<float, A> const& other, requires_arch<sse2>) noexcept
-        {
-            return _mm_mul_ps(self, other);
-        }
-        template <class A>
-        XSIMD_INLINE batch<double, A> mul(batch<double, A> const& self, batch<double, A> const& other, requires_arch<sse2>) noexcept
-        {
-            return _mm_mul_pd(self, other);
-        }
-
-        // mul
-        template <class A>
-        XSIMD_INLINE batch<int16_t, A> mul(batch<int16_t, A> const& self, batch<int16_t, A> const& other, requires_arch<sse2>) noexcept
+        template <class A, class T, typename std::enable_if<std::is_scalar<T>::value, void>::type>
+        XSIMD_INLINE batch<T, A> mul(batch<T, A> const& self, batch<T, A> const& other, requires_arch<altivec>) noexcept
         {
-            return _mm_mullo_epi16(self, other);
+            return vec_mul(self, other);
         }
+#if 0
 
         // nearbyint_as_int
         template <class A>
@@ -1388,7 +1378,7 @@ namespace xsimd
         template <class A, class T, class = typename std::enable_if<std::is_scalar<T>::value, void>::type>
         XSIMD_INLINE batch<T, A> sadd(batch<T, A> const& self, batch<T, A> const& other, requires_arch<altivec>) noexcept
         {
-          return vec_adds(self, other);
+            return vec_adds(self, other);
         }
 #if 0
 
@@ -1454,17 +1444,16 @@ namespace xsimd
         template <class A, class T, class = typename std::enable_if<std::is_scalar<T>::value, void>::type>
         XSIMD_INLINE batch<T, A> ssub(batch<T, A> const& self, batch<T, A> const& other, requires_arch<altivec>) noexcept
         {
-          XSIMD_IF_CONSTEXPR(sizeof(T) == 1)
-          {
-              return vec_subs(self, other);
-          }
-          else
-          {
-              return ssub(self, other, common {});
-          }
+            XSIMD_IF_CONSTEXPR(sizeof(T) == 1)
+            {
+                return vec_subs(self, other);
+            }
+            else
+            {
+                return ssub(self, other, common {});
+            }
         }
 
-
         // store_aligned
         template <class A, class T, class = typename std::enable_if<std::is_scalar<T>::value, void>::type>
         XSIMD_INLINE void store_aligned(T* mem, batch<T, A> const& self, requires_arch<altivec>) noexcept
@@ -1479,44 +1468,14 @@ namespace xsimd
             *(typename batch<T, A>::register_type)mem = self;
         }
 
-#if 0
         // sub
-        template <class A>
-        XSIMD_INLINE batch<float, A> sub(batch<float, A> const& self, batch<float, A> const& other, requires_arch<sse2>) noexcept
-        {
-            return _mm_sub_ps(self, other);
-        }
-        template <class A, class T, class = typename std::enable_if<std::is_integral<T>::value, void>::type>
-        XSIMD_INLINE batch<T, A> sub(batch<T, A> const& self, batch<T, A> const& other, requires_arch<sse2>) noexcept
-        {
-            XSIMD_IF_CONSTEXPR(sizeof(T) == 1)
-            {
-                return _mm_sub_epi8(self, other);
-            }
-            else XSIMD_IF_CONSTEXPR(sizeof(T) == 2)
-            {
-                return _mm_sub_epi16(self, other);
-            }
-            else XSIMD_IF_CONSTEXPR(sizeof(T) == 4)
-            {
-                return _mm_sub_epi32(self, other);
-            }
-            else XSIMD_IF_CONSTEXPR(sizeof(T) == 8)
-            {
-                return _mm_sub_epi64(self, other);
-            }
-            else
-            {
-                assert(false && "unsupported arch/op combination");
-                return {};
-            }
-        }
-        template <class A>
-        XSIMD_INLINE batch<double, A> sub(batch<double, A> const& self, batch<double, A> const& other, requires_arch<sse2>) noexcept
+        template <class A, class T, class = typename std::enable_if<std::is_scalar<T>::value, void>::type>
+        XSIMD_INLINE batch<T, A> sub(batch<T, A> const& self, batch<T, A> const& other, requires_arch<altivec>) noexcept
         {
-            return _mm_sub_pd(self, other);
+            return vec_sub(self, other);
         }
 
+#if 0
         // swizzle
 
         template <class A, uint32_t V0, uint32_t V1, uint32_t V2, uint32_t V3>

include/xsimd/config/xsimd_arch.hpp

@@ -169,14 +169,16 @@ namespace xsimd
     using all_sve_architectures = arch_list<detail::sve<512>, detail::sve<256>, detail::sve<128>>;
     using all_rvv_architectures = arch_list<detail::rvv<512>, detail::rvv<256>, detail::rvv<128>>;
     using all_arm_architectures = typename detail::join<all_sve_architectures, arch_list<i8mm<neon64>, neon64, neon>>::type;
+    using all_power_architectures = arch_list<altivec>;
     using all_riscv_architectures = all_rvv_architectures;
     using all_wasm_architectures = arch_list<wasm>;
-    using all_architectures = typename detail::join<all_riscv_architectures, all_wasm_architectures, all_arm_architectures, all_x86_architectures>::type;
+    using all_architectures = typename detail::join<all_power_architectures, all_riscv_architectures, all_wasm_architectures, all_arm_architectures, all_x86_architectures>::type;
 
     using supported_architectures = typename detail::supported<all_architectures>::type;
 
     using x86_arch = typename detail::supported<all_x86_architectures>::type::best;
     using arm_arch = typename detail::supported<all_arm_architectures>::type::best;
+    using power_arch = typename detail::supported<all_power_architectures>::type::best;
     using riscv_arch = typename detail::supported<all_riscv_architectures>::type::best;
     using best_arch = typename supported_architectures::best;
 

include/xsimd/config/xsimd_cpuid.hpp

@@ -84,6 +84,7 @@ namespace xsimd
             ARCH_FIELD_EX_REUSE(detail::rvv<256>, rvv)
             ARCH_FIELD_EX_REUSE(detail::rvv<128>, rvv)
             ARCH_FIELD(wasm)
+            ARCH_FIELD(altivec)
 
 #undef ARCH_FIELD
 
@@ -95,6 +96,10 @@ namespace xsimd
                 wasm = 1;
 #endif
 
+#if XSIMD_WITH_ALTIVEC
+                altivec = 1;
+#endif
+
 #if defined(__aarch64__) || defined(_M_ARM64)
                 neon = 1;
                 neon64 = 1;