riscv

serge-sans-paille · serge-sans-paille · commit 727d48c205e2 · 2025-09-11T08:31:18.000+02:00
diff --git a/include/xsimd/arch/xsimd_rvv.hpp b/include/xsimd/arch/xsimd_rvv.hpp
@@ -742,14 +742,14 @@ namespace xsimd
         template <class A, class T, detail::rvv_enable_all_t<T> = 0>
         XSIMD_INLINE batch<T, A> max(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<rvv>) noexcept
         {
-            return detail::rvvmax(lhs, rhs);
+            return detail::rvvmax(rhs, lhs);
         }
 
         // min
         template <class A, class T, detail::rvv_enable_all_t<T> = 0>
         XSIMD_INLINE batch<T, A> min(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<rvv>) noexcept
         {
-            return detail::rvvmin(lhs, rhs);
+            return detail::rvvmin(rhs, lhs);
         }
 
         // neg

Original file line number	Diff line number	Diff line change
`@@ -742,14 +742,14 @@ namespace xsimd`
`742`	`742`	`template <class A, class T, detail::rvv_enable_all_t<T> = 0>`
`743`	`743`	`XSIMD_INLINE batch<T, A> max(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<rvv>) noexcept`
`744`	`744`	`{`
`745`		`- return detail::rvvmax(lhs, rhs);`
	`745`	`+ return detail::rvvmax(rhs, lhs);`
`746`	`746`	`}`
`747`	`747`
`748`	`748`	`// min`
`749`	`749`	`template <class A, class T, detail::rvv_enable_all_t<T> = 0>`
`750`	`750`	`XSIMD_INLINE batch<T, A> min(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<rvv>) noexcept`
`751`	`751`	`{`
`752`		`- return detail::rvvmin(lhs, rhs);`
	`752`	`+ return detail::rvvmin(rhs, lhs);`
`753`	`753`	`}`
`754`	`754`
`755`	`755`	`// neg`