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Fix RISCV build
1 parent 1b3e69d commit 77cbfa9

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2 files changed

+29
-37
lines changed

2 files changed

+29
-37
lines changed

include/xsimd/arch/xsimd_rvv.hpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -513,7 +513,7 @@ namespace xsimd
513513
return __riscv_vset(tmp, 1, hi);
514514
}
515515

516-
template <class T, size_t W, std::enable_if_t<W<types::detail::rvv_width_m1, int>::type = 0> D_INLINE rvv_reg_t<T, W * 2> rvvabut(rvv_reg_t<T, W> const& lo, rvv_reg_t<T, W> const& hi) noexcept
516+
template <class T, size_t W, std::enable_if_t<W<types::detail::rvv_width_m1, int> = 0> XSIMD_INLINE rvv_reg_t<T, W * 2> rvvabut(rvv_reg_t<T, W> const& lo, rvv_reg_t<T, W> const& hi) noexcept
517517
{
518518
return __riscv_vslideup(lo, hi, lo.vl, lo.vl * 2);
519519
}
@@ -538,7 +538,7 @@ namespace xsimd
538538
typename rvv_reg_t<T, W>::register_type tmp = vv;
539539
return tmp;
540540
}
541-
template <class T, size_t W, std::enable_if_t<W<types::detail::rvv_width_m1, int>::type = 0> reg_t<T, W> rvvget_hi(rvv_reg_t<T, W * 2> const& vv) noexcept
541+
template <class T, size_t W, std::enable_if_t<W<types::detail::rvv_width_m1, int> = 0> rvv_reg_t<T, W> rvvget_hi(rvv_reg_t<T, W * 2> const& vv) noexcept
542542
{
543543
return __riscv_vslidedown(vv, vv.vl / 2, vv.vl);
544544
}

include/xsimd/types/xsimd_rvv_register.hpp

Lines changed: 27 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -219,6 +219,25 @@ namespace xsimd
219219
type get() const { return value; }
220220
void set(type v) { value = v; }
221221
};
222+
223+
template <size_t div>
224+
struct semitype;
225+
template <>
226+
struct semitype<2>
227+
{
228+
using type = vuint8mf2_t __attribute__((riscv_rvv_vector_bits(XSIMD_RVV_WIDTH_MF2)));
229+
};
230+
template <>
231+
struct semitype<4>
232+
{
233+
using type = vuint8mf4_t __attribute__((riscv_rvv_vector_bits(XSIMD_RVV_WIDTH_MF4)));
234+
};
235+
template <>
236+
struct semitype<8>
237+
{
238+
using type = vuint8mf8_t __attribute__((riscv_rvv_vector_bits(XSIMD_RVV_WIDTH_MF8)));
239+
};
240+
222241
//
223242
// But sometimes we want our storage type to be less than a whole
224243
// register, while presenting as a whole register to the outside
@@ -233,53 +252,26 @@ namespace xsimd
233252
using super = rvv_type_info<T, rvv_width_m1>;
234253
static constexpr size_t width = rvv_width_m1 / divisor;
235254
using typename super::type;
236-
template <size_t div>
237-
struct semitype;
238-
template <>
239-
struct semitype<2>
240-
{
241-
using type = vuint8mf2_t __attribute__((riscv_rvv_vector_bits(XSIMD_RVV_WIDTH_MF2)));
242-
};
243-
template <>
244-
struct semitype<4>
245-
{
246-
using type = vuint8mf4_t __attribute__((riscv_rvv_vector_bits(XSIMD_RVV_WIDTH_MF4)));
247-
};
248-
template <>
249-
struct semitype<8>
250-
{
251-
using type = vuint8mf8_t __attribute__((riscv_rvv_vector_bits(XSIMD_RVV_WIDTH_MF8)));
252-
};
253255
using fixed_type = typename semitype<divisor>::type;
254256
using super::as_bytes;
255257
using super::bitcast;
256258

257259
fixed_type value;
258-
template <size_t div>
259-
vuint8m1_t get_bytes() const;
260-
template <>
261-
vuint8m1_t get_bytes<2>() const { return __riscv_vlmul_ext_v_u8mf2_u8m1(value); }
262-
template <>
263-
vuint8m1_t get_bytes<4>() const { return __riscv_vlmul_ext_v_u8mf4_u8m1(value); }
264-
template <>
265-
vuint8m1_t get_bytes<8>() const { return __riscv_vlmul_ext_v_u8mf8_u8m1(value); }
260+
vuint8m1_t get_bytes(std::integral_constant<size_t, 2>) const { return __riscv_vlmul_ext_v_u8mf2_u8m1(value); }
261+
vuint8m1_t get_bytes(std::integral_constant<size_t, 4>) const { return __riscv_vlmul_ext_v_u8mf4_u8m1(value); }
262+
vuint8m1_t get_bytes(std::integral_constant<size_t, 8>) const { return __riscv_vlmul_ext_v_u8mf8_u8m1(value); }
266263
type get() const noexcept
267264
{
268-
vuint8m1_t bytes = get_bytes<divisor>();
265+
vuint8m1_t bytes = get_bytes(std::integral_constant<size_t, divisor>());
269266
return bitcast(bytes);
270267
}
271-
template <size_t div>
272-
void set_bytes(vuint8m1_t);
273-
template <>
274-
void set_bytes<2>(vuint8m1_t v) { value = __riscv_vlmul_trunc_v_u8m1_u8mf2(v); }
275-
template <>
276-
void set_bytes<4>(vuint8m1_t v) { value = __riscv_vlmul_trunc_v_u8m1_u8mf4(v); }
277-
template <>
278-
void set_bytes<8>(vuint8m1_t v) { value = __riscv_vlmul_trunc_v_u8m1_u8mf8(v); }
268+
void set_bytes<2>(vuint8m1_t v, std::integral_constant<size_t, 2>) { value = __riscv_vlmul_trunc_v_u8m1_u8mf2(v); }
269+
void set_bytes<4>(vuint8m1_t v, std::integral_constant<size_t, 4>) { value = __riscv_vlmul_trunc_v_u8m1_u8mf4(v); }
270+
void set_bytes<8>(vuint8m1_t v, std::integral_constant<size_t, 8>) { value = __riscv_vlmul_trunc_v_u8m1_u8mf8(v); }
279271
void set(type v)
280272
{
281273
vuint8m1_t bytes = as_bytes(v);
282-
set_bytes<divisor>(bytes);
274+
set_bytes(bytes, std::integral_constant<size_t, divisor>());
283275
}
284276
};
285277
template <class T>

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