change avx2 loads, fix some random errors

kalenedrael · kalenedrael · commit 82e677c6e76a · 2025-09-30T00:25:40.000-05:00
diff --git a/include/xsimd/arch/xsimd_avx2.hpp b/include/xsimd/arch/xsimd_avx2.hpp
@@ -579,29 +579,26 @@ namespace xsimd
             {
                 XSIMD_IF_CONSTEXPR(sizeof(T) == 1)
                 {
-                    auto maskz = _mm256_cmpeq_epi8(_mm256_loadu_si256((__m256i const*)mem), _mm256_set1_epi8(0));
-                    return _mm256_xor_si256(maskz, _mm256_set1_epi8(-1));
+                    return _mm256_sub_epi8(_mm256_set1_epi8(0), _mm256_loadu_si256((__m256i const*)mem));
                 }
                 else XSIMD_IF_CONSTEXPR(sizeof(T) == 2)
                 {
                     auto bpack = _mm_loadu_si128((__m128i const*)mem);
-                    return _mm256_cmpgt_epi16(_mm256_cvtepu8_epi16(bpack), _mm256_set1_epi16(0));
+                    return _mm256_sub_epi16(_mm256_set1_epi8(0), _mm256_cvtepu8_epi16(bpack));
                 }
                 // GCC <12 have missing or buggy unaligned load intrinsics; use memcpy to work around this.
                 // GCC/Clang/MSVC will turn it into the correct load.
                 else XSIMD_IF_CONSTEXPR(sizeof(T) == 4)
                 {
                     uint64_t tmp;
                     memcpy(&tmp, mem, sizeof(tmp));
-                    auto bpack = _mm_cvtsi64_si128(tmp);
-                    return _mm256_cmpgt_epi32(_mm256_cvtepu8_epi32(bpack), _mm256_set1_epi32(0));
+                    return _mm256_sub_epi32(_mm256_set1_epi8(0), _mm256_cvtepu8_epi32(_mm_cvtsi64_si128(tmp)));
                 }
                 else XSIMD_IF_CONSTEXPR(sizeof(T) == 8)
                 {
                     uint32_t tmp;
                     memcpy(&tmp, mem, sizeof(tmp));
-                    auto bpack = _mm_cvtsi32_si128(tmp);
-                    return _mm256_cmpgt_epi64(_mm256_cvtepu8_epi64(bpack), _mm256_set1_epi64x(0));
+                    return _mm256_sub_epi64(_mm256_set1_epi8(0), _mm256_cvtepu8_epi64(_mm_cvtsi32_si128(tmp)));
                 }
                 else
                 {
diff --git a/include/xsimd/arch/xsimd_sse2.hpp b/include/xsimd/arch/xsimd_sse2.hpp
@@ -1713,8 +1713,9 @@ namespace xsimd
                 }
                 else XSIMD_IF_CONSTEXPR(sizeof(T) == 2)
                 {
-                    uint64_t val = _mm_cvtsi128_si64(_mm_sub_epi8(_mm_set1_epi8(0), _mm_packs_epi16(b, b)));
-                    memcpy(mem, &val, sizeof(val));
+                    auto val = _mm_sub_epi8(_mm_set1_epi8(0), _mm_packs_epi16(b, b));
+                    // store only lower 64 bits
+                    memcpy(mem, &val, sizeof(uint64_t));
                 }
                 else XSIMD_IF_CONSTEXPR(sizeof(T) == 4)
                 {
diff --git a/include/xsimd/arch/xsimd_sse4_1.hpp b/include/xsimd/arch/xsimd_sse4_1.hpp
@@ -144,7 +144,6 @@ namespace xsimd
                 {
                     uint32_t tmp;
                     memcpy(&tmp, mem, sizeof(tmp));
-                    auto bpack = _mm_cvtsi32_si128(tmp);
                     return _mm_sub_epi32(_mm_set1_epi8(0), _mm_cvtepu8_epi32(_mm_cvtsi32_si128(tmp)));
                 }
                 else XSIMD_IF_CONSTEXPR(sizeof(T) == 8)

Original file line number	Diff line number	Diff line change
`@@ -579,29 +579,26 @@ namespace xsimd`
`579`	`579`	`{`
`580`	`580`	`XSIMD_IF_CONSTEXPR(sizeof(T) == 1)`
`581`	`581`	`{`
`582`		`- auto maskz = _mm256_cmpeq_epi8(_mm256_loadu_si256((__m256i const*)mem), _mm256_set1_epi8(0));`
`583`		`- return _mm256_xor_si256(maskz, _mm256_set1_epi8(-1));`
	`582`	`+ return _mm256_sub_epi8(_mm256_set1_epi8(0), _mm256_loadu_si256((__m256i const*)mem));`
`584`	`583`	`}`
`585`	`584`	`else XSIMD_IF_CONSTEXPR(sizeof(T) == 2)`
`586`	`585`	`{`
`587`	`586`	`auto bpack = _mm_loadu_si128((__m128i const*)mem);`
`588`		`- return _mm256_cmpgt_epi16(_mm256_cvtepu8_epi16(bpack), _mm256_set1_epi16(0));`
	`587`	`+ return _mm256_sub_epi16(_mm256_set1_epi8(0), _mm256_cvtepu8_epi16(bpack));`
`589`	`588`	`}`
`590`	`589`	`// GCC <12 have missing or buggy unaligned load intrinsics; use memcpy to work around this.`
`591`	`590`	`// GCC/Clang/MSVC will turn it into the correct load.`
`592`	`591`	`else XSIMD_IF_CONSTEXPR(sizeof(T) == 4)`
`593`	`592`	`{`
`594`	`593`	`uint64_t tmp;`
`595`	`594`	`memcpy(&tmp, mem, sizeof(tmp));`
`596`		`- auto bpack = _mm_cvtsi64_si128(tmp);`
`597`		`- return _mm256_cmpgt_epi32(_mm256_cvtepu8_epi32(bpack), _mm256_set1_epi32(0));`
	`595`	`+ return _mm256_sub_epi32(_mm256_set1_epi8(0), _mm256_cvtepu8_epi32(_mm_cvtsi64_si128(tmp)));`
`598`	`596`	`}`
`599`	`597`	`else XSIMD_IF_CONSTEXPR(sizeof(T) == 8)`
`600`	`598`	`{`
`601`	`599`	`uint32_t tmp;`
`602`	`600`	`memcpy(&tmp, mem, sizeof(tmp));`
`603`		`- auto bpack = _mm_cvtsi32_si128(tmp);`
`604`		`- return _mm256_cmpgt_epi64(_mm256_cvtepu8_epi64(bpack), _mm256_set1_epi64x(0));`
	`601`	`+ return _mm256_sub_epi64(_mm256_set1_epi8(0), _mm256_cvtepu8_epi64(_mm_cvtsi32_si128(tmp)));`
`605`	`602`	`}`
`606`	`603`	`else`
`607`	`604`	`{`
Original file line number	Diff line number	Diff line change
`@@ -1713,8 +1713,9 @@ namespace xsimd`
`1713`	`1713`	`}`
`1714`	`1714`	`else XSIMD_IF_CONSTEXPR(sizeof(T) == 2)`
`1715`	`1715`	`{`
`1716`		`- uint64_t val = _mm_cvtsi128_si64(_mm_sub_epi8(_mm_set1_epi8(0), _mm_packs_epi16(b, b)));`
`1717`		`- memcpy(mem, &val, sizeof(val));`
	`1716`	`+ auto val = _mm_sub_epi8(_mm_set1_epi8(0), _mm_packs_epi16(b, b));`
	`1717`	`+ // store only lower 64 bits`
	`1718`	`+ memcpy(mem, &val, sizeof(uint64_t));`
`1718`	`1719`	`}`
`1719`	`1720`	`else XSIMD_IF_CONSTEXPR(sizeof(T) == 4)`
`1720`	`1721`	`{`
Original file line number	Diff line number	Diff line change
`@@ -144,7 +144,6 @@ namespace xsimd`
`144`	`144`	`{`
`145`	`145`	`uint32_t tmp;`
`146`	`146`	`memcpy(&tmp, mem, sizeof(tmp));`
`147`		`- auto bpack = _mm_cvtsi32_si128(tmp);`
`148`	`147`	`return _mm_sub_epi32(_mm_set1_epi8(0), _mm_cvtepu8_epi32(_mm_cvtsi32_si128(tmp)));`
`149`	`148`	`}`
`150`	`149`	`else XSIMD_IF_CONSTEXPR(sizeof(T) == 8)`