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serge-sans-pailleserge-sans-paille
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Upgrade formatting to clang-format-17
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+30
-30
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8 files changed

+30
-30
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‎.github/workflows/style-check.yml‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@ jobs:
1212
- name: Run clang-format style check for C/C++ programs.
1313
uses: jidicula/[email protected]
1414
with:
15-
clang-format-version: '16'
15+
clang-format-version: '17'
1616
exclude-regex: 'doctest.h'
1717
inlining-check:
1818
runs-on: ubuntu-latest

‎include/xsimd/arch/xsimd_rvv.hpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -550,7 +550,7 @@ namespace xsimd
550550
const auto imag_index = vindex<A, as_unsigned_integer_t<T>, 1, 1>();
551551
const auto index = rvvabut<as_unsigned_integer_t<T>, A::width>(real_index, imag_index);
552552
const auto input = rvvabut<T, A::width>(lo.data, hi.data);
553-
const rvv_reg_t<T, A::width* 2> result = __riscv_vrgather(input, index, index.vl);
553+
const rvv_reg_t<T, A::width * 2> result = __riscv_vrgather(input, index, index.vl);
554554

555555
return { rvvget_lo<T, A::width>(result), rvvget_hi<T, A::width>(result) };
556556
}

‎include/xsimd/arch/xsimd_wasm.hpp‎

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -1159,31 +1159,31 @@ namespace xsimd
11591159
inline batch<T, A> slide_left(batch<T, A> const& x, requires_arch<wasm>) noexcept
11601160
{
11611161
return wasm_i8x16_shuffle(
1162-
wasm_i64x2_const(0, 0), x, ((N)&0xF0) ? 0 : 16 - ((N)&0xF),
1163-
((N)&0xF0) ? 0 : 17 - ((N)&0xF), ((N)&0xF0) ? 0 : 18 - ((N)&0xF),
1164-
((N)&0xF0) ? 0 : 19 - ((N)&0xF), ((N)&0xF0) ? 0 : 20 - ((N)&0xF),
1165-
((N)&0xF0) ? 0 : 21 - ((N)&0xF), ((N)&0xF0) ? 0 : 22 - ((N)&0xF),
1166-
((N)&0xF0) ? 0 : 23 - ((N)&0xF), ((N)&0xF0) ? 0 : 24 - ((N)&0xF),
1167-
((N)&0xF0) ? 0 : 25 - ((N)&0xF), ((N)&0xF0) ? 0 : 26 - ((N)&0xF),
1168-
((N)&0xF0) ? 0 : 27 - ((N)&0xF), ((N)&0xF0) ? 0 : 28 - ((N)&0xF),
1169-
((N)&0xF0) ? 0 : 29 - ((N)&0xF), ((N)&0xF0) ? 0 : 30 - ((N)&0xF),
1170-
((N)&0xF0) ? 0 : 31 - ((N)&0xF));
1162+
wasm_i64x2_const(0, 0), x, ((N) & 0xF0) ? 0 : 16 - ((N) & 0xF),
1163+
((N) & 0xF0) ? 0 : 17 - ((N) & 0xF), ((N) & 0xF0) ? 0 : 18 - ((N) & 0xF),
1164+
((N) & 0xF0) ? 0 : 19 - ((N) & 0xF), ((N) & 0xF0) ? 0 : 20 - ((N) & 0xF),
1165+
((N) & 0xF0) ? 0 : 21 - ((N) & 0xF), ((N) & 0xF0) ? 0 : 22 - ((N) & 0xF),
1166+
((N) & 0xF0) ? 0 : 23 - ((N) & 0xF), ((N) & 0xF0) ? 0 : 24 - ((N) & 0xF),
1167+
((N) & 0xF0) ? 0 : 25 - ((N) & 0xF), ((N) & 0xF0) ? 0 : 26 - ((N) & 0xF),
1168+
((N) & 0xF0) ? 0 : 27 - ((N) & 0xF), ((N) & 0xF0) ? 0 : 28 - ((N) & 0xF),
1169+
((N) & 0xF0) ? 0 : 29 - ((N) & 0xF), ((N) & 0xF0) ? 0 : 30 - ((N) & 0xF),
1170+
((N) & 0xF0) ? 0 : 31 - ((N) & 0xF));
11711171
}
11721172

11731173
// slide_right
11741174
template <size_t N, class A, class T>
11751175
inline batch<T, A> slide_right(batch<T, A> const& x, requires_arch<wasm>) noexcept
11761176
{
11771177
return wasm_i8x16_shuffle(
1178-
x, wasm_i64x2_const(0, 0), ((N)&0xF0) ? 16 : ((N)&0xF) + 0,
1179-
((N)&0xF0) ? 16 : ((N)&0xF) + 1, ((N)&0xF0) ? 16 : ((N)&0xF) + 2,
1180-
((N)&0xF0) ? 16 : ((N)&0xF) + 3, ((N)&0xF0) ? 16 : ((N)&0xF) + 4,
1181-
((N)&0xF0) ? 16 : ((N)&0xF) + 5, ((N)&0xF0) ? 16 : ((N)&0xF) + 6,
1182-
((N)&0xF0) ? 16 : ((N)&0xF) + 7, ((N)&0xF0) ? 16 : ((N)&0xF) + 8,
1183-
((N)&0xF0) ? 16 : ((N)&0xF) + 9, ((N)&0xF0) ? 16 : ((N)&0xF) + 10,
1184-
((N)&0xF0) ? 16 : ((N)&0xF) + 11, ((N)&0xF0) ? 16 : ((N)&0xF) + 12,
1185-
((N)&0xF0) ? 16 : ((N)&0xF) + 13, ((N)&0xF0) ? 16 : ((N)&0xF) + 14,
1186-
((N)&0xF0) ? 16 : ((N)&0xF) + 15);
1178+
x, wasm_i64x2_const(0, 0), ((N) & 0xF0) ? 16 : ((N) & 0xF) + 0,
1179+
((N) & 0xF0) ? 16 : ((N) & 0xF) + 1, ((N) & 0xF0) ? 16 : ((N) & 0xF) + 2,
1180+
((N) & 0xF0) ? 16 : ((N) & 0xF) + 3, ((N) & 0xF0) ? 16 : ((N) & 0xF) + 4,
1181+
((N) & 0xF0) ? 16 : ((N) & 0xF) + 5, ((N) & 0xF0) ? 16 : ((N) & 0xF) + 6,
1182+
((N) & 0xF0) ? 16 : ((N) & 0xF) + 7, ((N) & 0xF0) ? 16 : ((N) & 0xF) + 8,
1183+
((N) & 0xF0) ? 16 : ((N) & 0xF) + 9, ((N) & 0xF0) ? 16 : ((N) & 0xF) + 10,
1184+
((N) & 0xF0) ? 16 : ((N) & 0xF) + 11, ((N) & 0xF0) ? 16 : ((N) & 0xF) + 12,
1185+
((N) & 0xF0) ? 16 : ((N) & 0xF) + 13, ((N) & 0xF0) ? 16 : ((N) & 0xF) + 14,
1186+
((N) & 0xF0) ? 16 : ((N) & 0xF) + 15);
11871187
}
11881188

11891189
// sadd

‎include/xsimd/config/xsimd_arch.hpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -191,9 +191,9 @@ namespace xsimd
191191
{
192192
};
193193
using all_x86_architectures = arch_list<
194-
avx512vnni<avx512vbmi>, avx512vbmi, avx512ifma, avx512pf, avx512vnni<avx512bw>, avx512bw, avx512er, avx512dq, avx512cd, avx512f,
195-
avxvnni, fma3<avx2>, avx2, fma3<avx>, avx, fma4, fma3<sse4_2>,
196-
sse4_2, sse4_1, /*sse4a,*/ ssse3, sse3, sse2>;
194+
avx512vnni<avx512vbmi>, avx512vbmi, avx512ifma, avx512pf, avx512vnni<avx512bw>, avx512bw, avx512er, avx512dq, avx512cd, avx512f,
195+
avxvnni, fma3<avx2>, avx2, fma3<avx>, avx, fma4, fma3<sse4_2>,
196+
sse4_2, sse4_1, /*sse4a,*/ ssse3, sse3, sse2>;
197197

198198
using all_sve_architectures = arch_list<detail::sve<512>, detail::sve<256>, detail::sve<128>>;
199199
using all_rvv_architectures = arch_list<detail::rvv<512>, detail::rvv<256>, detail::rvv<128>>;

‎include/xsimd/types/xsimd_all_registers.hpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -22,8 +22,8 @@
2222
#include "xsimd_fma3_avx2_register.hpp"
2323
#include "xsimd_fma3_avx_register.hpp"
2424

25-
#include "xsimd_avx512vnni_avx512vbmi_register.hpp"
2625
#include "xsimd_avx512vnni_avx512bw_register.hpp"
26+
#include "xsimd_avx512vnni_avx512vbmi_register.hpp"
2727

2828
#include "xsimd_avx512ifma_register.hpp"
2929
#include "xsimd_avx512vbmi_register.hpp"

‎include/xsimd/types/xsimd_avx512vnni_avx512bw_register.hpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -16,15 +16,15 @@
1616

1717
namespace xsimd
1818
{
19-
template<typename arch>
19+
template <typename arch>
2020
struct avx512vnni;
2121

2222
/**
2323
* @ingroup architectures
2424
*
2525
* AVX512VNNI instructions
2626
*/
27-
template<>
27+
template <>
2828
struct avx512vnni<avx512bw> : avx512bw
2929
{
3030
static constexpr bool supported() noexcept { return XSIMD_WITH_AVX512VNNI_AVX512BW; }

‎include/xsimd/types/xsimd_avx512vnni_avx512vbmi_register.hpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -16,15 +16,15 @@
1616

1717
namespace xsimd
1818
{
19-
template<typename arch>
19+
template <typename arch>
2020
struct avx512vnni;
2121

2222
/**
2323
* @ingroup architectures
2424
*
2525
* AVX512VNNI instructions
2626
*/
27-
template<>
27+
template <>
2828
struct avx512vnni<avx512vbmi> : avx512vbmi
2929
{
3030
static constexpr bool supported() noexcept { return XSIMD_WITH_AVX512VNNI_AVX512VBMI; }

‎include/xsimd/types/xsimd_batch_constant.hpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -88,7 +88,7 @@ namespace xsimd
8888
#define MAKE_BINARY_OP(OP, NAME) \
8989
template <bool... OtherValues> \
9090
constexpr auto operator OP(batch_bool_constant<batch_type, OtherValues...> other) const \
91-
->decltype(apply<NAME>(*this, other)) \
91+
-> decltype(apply<NAME>(*this, other)) \
9292
{ \
9393
return apply<NAME>(*this, other); \
9494
}
@@ -199,7 +199,7 @@ namespace xsimd
199199
#define MAKE_BINARY_OP(OP, NAME) \
200200
template <value_type... OtherValues> \
201201
constexpr auto operator OP(batch_constant<batch_type, OtherValues...> other) const \
202-
->decltype(apply<NAME>(*this, other)) \
202+
-> decltype(apply<NAME>(*this, other)) \
203203
{ \
204204
return apply<NAME>(*this, other); \
205205
}

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