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serge-sans-pailleserge-sans-paille
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Test and improve GCC support for riscv
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‎.github/workflows/cross-rvv.yml‎

Lines changed: 14 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -3,36 +3,37 @@ on: [push, pull_request]
33
concurrency:
44
group: ${{ github.workflow }}-${{ github.job }}-${{ github.ref }}
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cancel-in-progress: true
6-
env:
7-
GCC_VERSION: "12"
86
jobs:
97
build:
108
runs-on: ubuntu-latest
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name: 'RISC-V RVV${{ matrix.vector_bits }}'
1210
strategy:
1311
matrix:
12+
sys:
13+
- { compiler: 'g++', version: '14' }
14+
- { compiler: 'clang++', version: '17' }
15+
- { compiler: 'clang++', version: '18' }
1416
vector_bits:
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- 128
1618
- 256
1719
- 512
18-
LLVM_VERSION:
19-
- 17
20-
- 18
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steps:
2221
- name: Setup GCC
22+
if: ${{ matrix.sys.compiler == 'g++' }}
2323
run: |
2424
sudo apt-get -y -qq update
25-
sudo apt-get -y -qq --no-install-suggests --no-install-recommends install gcc-${GCC_VERSION}-riscv64-linux-gnu g++-${GCC_VERSION}-riscv64-linux-gnu
26-
sudo update-alternatives --install /usr/bin/riscv64-linux-gnu-gcc riscv64-linux-gnu-gcc /usr/bin/riscv64-linux-gnu-gcc-${GCC_VERSION} 20
27-
sudo update-alternatives --install /usr/bin/riscv64-linux-gnu-g++ riscv64-linux-gnu-g++ /usr/bin/riscv64-linux-gnu-g++-${GCC_VERSION} 20
25+
sudo apt-get -y -qq --no-install-suggests --no-install-recommends install gcc-${{ matrix.sys.version }}-riscv64-linux-gnu g++-${{ matrix.sys.version }}-riscv64-linux-gnu
26+
sudo update-alternatives --install /usr/bin/riscv64-linux-gnu-gcc riscv64-linux-gnu-gcc /usr/bin/riscv64-linux-gnu-gcc-${{ matrix.sys.version }} 20
27+
sudo update-alternatives --install /usr/bin/riscv64-linux-gnu-g++ riscv64-linux-gnu-g++ /usr/bin/riscv64-linux-gnu-g++-${{ matrix.sys.version }} 20
2828
- name: Setup LLVM
29+
if: ${{ matrix.sys.compiler == 'clang++' }}
2930
run: |
30-
# Install latest LLVM stable
31+
# Install given LLVM version
3132
curl -o llvm.sh https://apt.llvm.org/llvm.sh
3233
chmod u+x llvm.sh
33-
sudo ./llvm.sh ${{ matrix.LLVM_VERSION }}
34-
sudo ln -srf $(which clang-${{ matrix.LLVM_VERSION }}) /usr/bin/clang
35-
sudo ln -srf $(which clang++-${{ matrix.LLVM_VERSION }}) /usr/bin/clang++
34+
sudo ./llvm.sh ${{ matrix.sys.version }}
35+
sudo ln -srf $(which clang-${{ matrix.sys.version }}) /usr/bin/clang
36+
sudo ln -srf $(which clang++-${{ matrix.sys.version }}) /usr/bin/clang++
3637
rm llvm.sh
3738
- name: Setup QEMU
3839
uses: docker/[email protected]
@@ -51,6 +52,7 @@ jobs:
5152
-DDOWNLOAD_DOCTEST=ON
5253
-DCMAKE_BUILD_TYPE=Release
5354
-DTARGET_ARCH=generic
55+
-DCMAKE_CXX_COMPILER=${{ matrix.sys.compiler }}
5456
-DCMAKE_C_FLAGS="-march=rv64gcv_zvl${{ matrix.vector_bits }}b_zba_zbb_zbs -mrvv-vector-bits=zvl"
5557
-DCMAKE_CXX_FLAGS="-march=rv64gcv_zvl${{ matrix.vector_bits }}b_zba_zbb_zbs -mrvv-vector-bits=zvl"
5658
-DCMAKE_TOOLCHAIN_FILE=${{ github.workspace }}/.github/toolchains/clang-riscv64-linux-gnu.cmake

‎include/xsimd/types/xsimd_rvv_register.hpp‎

Lines changed: 17 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -62,9 +62,12 @@ namespace xsimd
6262
static constexpr size_t rvv_width_mf4 = XSIMD_RVV_BITS / 4;
6363
static constexpr size_t rvv_width_mf2 = XSIMD_RVV_BITS / 2;
6464
static constexpr size_t rvv_width_m1 = XSIMD_RVV_BITS;
65-
static constexpr size_t rvv_width_m2 = XSIMD_RVV_BITS * 2;
66-
static constexpr size_t rvv_width_m4 = XSIMD_RVV_BITS * 4;
67-
static constexpr size_t rvv_width_m8 = XSIMD_RVV_BITS * 8;
65+
66+
// Cope with gcc limitation, see https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116484
67+
#define XSIMD_RVV_WIDTH_MF8 (XSIMD_RVV_BITS / 8)
68+
#define XSIMD_RVV_WIDTH_MF4 (XSIMD_RVV_BITS / 4)
69+
#define XSIMD_RVV_WIDTH_MF2 (XSIMD_RVV_BITS / 2)
70+
#define XSIMD_RVV_WIDTH_M1 XSIMD_RVV_BITS
6871

6972
// rvv_type_info is a utility class to convert scalar type and
7073
// bitwidth into rvv register types.
@@ -86,7 +89,7 @@ namespace xsimd
8689
static constexpr size_t width = rvv_width_m1 * vmul; \
8790
using type = XSIMD_RVV_TYPE(t, s, vmul); \
8891
using byte_type = XSIMD_RVV_TYPE(u, 8, vmul); \
89-
using fixed_type = type __attribute__((riscv_rvv_vector_bits(width))); \
92+
using fixed_type = type __attribute__((riscv_rvv_vector_bits(/*width=*/XSIMD_RVV_WIDTH_M1 * vmul))); \
9093
template <class U> \
9194
static XSIMD_INLINE type bitcast(U x) noexcept \
9295
{ \
@@ -235,17 +238,17 @@ namespace xsimd
235238
template <>
236239
struct semitype<2>
237240
{
238-
using type = vuint8mf2_t __attribute__((riscv_rvv_vector_bits(rvv_width_mf2)));
241+
using type = vuint8mf2_t __attribute__((riscv_rvv_vector_bits(XSIMD_RVV_WIDTH_MF2)));
239242
};
240243
template <>
241244
struct semitype<4>
242245
{
243-
using type = vuint8mf4_t __attribute__((riscv_rvv_vector_bits(rvv_width_mf4)));
246+
using type = vuint8mf4_t __attribute__((riscv_rvv_vector_bits(XSIMD_RVV_WIDTH_MF4)));
244247
};
245248
template <>
246249
struct semitype<8>
247250
{
248-
using type = vuint8mf8_t __attribute__((riscv_rvv_vector_bits(rvv_width_mf8)));
251+
using type = vuint8mf8_t __attribute__((riscv_rvv_vector_bits(XSIMD_RVV_WIDTH_MF8)));
249252
};
250253
using fixed_type = typename semitype<divisor>::type;
251254
using super::as_bytes;
@@ -374,7 +377,7 @@ namespace xsimd
374377
struct rvv_bool
375378
{
376379
using bool_info = rvv_bool_info<rvv_width_m1 * sizeof(T) * 8 / Width>;
377-
using storage_type = vuint8m1_t __attribute__((riscv_rvv_vector_bits(rvv_width_m1)));
380+
using storage_type = vuint8m1_t __attribute__((riscv_rvv_vector_bits(XSIMD_RVV_WIDTH_M1)));
378381
using type = typename bool_info::type;
379382
storage_type value;
380383
rvv_bool() = default;
@@ -489,6 +492,12 @@ namespace xsimd
489492
using type = detail::rvv_bool_simd_register<T>;
490493
};
491494
} // namespace types
495+
496+
#undef XSIMD_RVV_WIDTH_MF8
497+
#undef XSIMD_RVV_WIDTH_MF4
498+
#undef XSIMD_RVV_WIDTH_MF2
499+
#undef XSIMD_RVV_WIDTH_M1
500+
492501
#else
493502
using rvv = detail::rvv<0xFFFFFFFF>;
494503
#endif

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