riscv

Author: serge-sans-paille

include/xsimd/arch/xsimd_neon.hpp

@@ -1333,7 +1333,13 @@ namespace xsimd
             using register_type = typename batch<T, A>::register_type;
             const detail::excluding_int64_dispatcher::binary dispatcher = {
                 std::make_tuple(wrap::vminq_u8, wrap::vminq_s8, wrap::vminq_u16, wrap::vminq_s16,
-                                wrap::vminq_u32, wrap::vminq_s32, wrap::vminq_f32)
+                                wrap::vminq_u32, wrap::vminq_s32,
+#ifdef __FAST_MATH__
+                                wrap::vminq_f32
+#else
+                                wrap::vminnmq_f32
+#endif
+                    )
             };
             return dispatcher.apply(register_type(lhs), register_type(rhs));
         }
@@ -1357,9 +1363,15 @@ namespace xsimd
             using register_type = typename batch<T, A>::register_type;
             const detail::excluding_int64_dispatcher::binary dispatcher = {
                 std::make_tuple(wrap::vmaxq_u8, wrap::vmaxq_s8, wrap::vmaxq_u16, wrap::vmaxq_s16,
-                                wrap::vmaxq_u32, wrap::vmaxq_s32, wrap::vmaxq_f32)
+                                wrap::vmaxq_u32, wrap::vmaxq_s32,
+#ifdef __FAST_MATH__
+                                wrap::vmaxq_f32
+#else
+                                wrap::vmaxnmq_f32
+#endif
+                                )
             };
-            return dispatcher.apply(register_type(rhs), register_type(lhs));
+            return dispatcher.apply(register_type(lhs), register_type(rhs));
         }
 
         template <class A, class T, detail::enable_sized_integral_t<T, 8> = 0>

include/xsimd/arch/xsimd_neon64.hpp

@@ -584,7 +584,11 @@ namespace xsimd
         template <class A>
         XSIMD_INLINE batch<double, A> min(batch<double, A> const& lhs, batch<double, A> const& rhs, requires_arch<neon64>) noexcept
         {
+#ifdef __FAST_MATH__
             return vminq_f64(lhs, rhs);
+#else
+            return vminnmq_f64(lhs, rhs);
+#endif
         }
 
         /*******
@@ -594,7 +598,11 @@ namespace xsimd
         template <class A>
         XSIMD_INLINE batch<double, A> max(batch<double, A> const& lhs, batch<double, A> const& rhs, requires_arch<neon64>) noexcept
         {
+#ifdef __FAST_MATH__
             return vmaxq_f64(lhs, rhs);
+#else
+            return vmaxnmq_f64(lhs, rhs);
+#endif
         }
 
         /*******

include/xsimd/arch/xsimd_rvv.hpp

@@ -742,14 +742,14 @@ namespace xsimd
         template <class A, class T, detail::rvv_enable_all_t<T> = 0>
         XSIMD_INLINE batch<T, A> max(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<rvv>) noexcept
         {
-            return detail::rvvmax(lhs, rhs);
+            return detail::rvvmax(rhs, lhs);
         }
 
         // min
         template <class A, class T, detail::rvv_enable_all_t<T> = 0>
         XSIMD_INLINE batch<T, A> min(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<rvv>) noexcept
         {
-            return detail::rvvmin(lhs, rhs);
+            return detail::rvvmin(rhs, lhs);
         }
 
         // neg

include/xsimd/arch/xsimd_vsx.hpp

@@ -470,14 +470,14 @@ namespace xsimd
         template <class A, class T, class = typename std::enable_if<std::is_scalar<T>::value, void>::type>
         XSIMD_INLINE batch<T, A> max(batch<T, A> const& self, batch<T, A> const& other, requires_arch<vsx>) noexcept
         {
-            return vec_max(self.data, other.data);
+            return vec_max(other.data, self.data);
         }
 
         // min
         template <class A, class T, class = typename std::enable_if<std::is_scalar<T>::value, void>::type>
         XSIMD_INLINE batch<T, A> min(batch<T, A> const& self, batch<T, A> const& other, requires_arch<vsx>) noexcept
         {
-            return vec_min(self.data, other.data);
+            return vec_min(other.data, self.data);
         }
 
         // mul