Fix RiscV build

serge-sans-paille · serge-sans-paille · commit e550b4b61cb3 · 2025-12-30T11:20:25.000+01:00
diff --git a/include/xsimd/arch/xsimd_rvv.hpp b/include/xsimd/arch/xsimd_rvv.hpp
@@ -515,7 +515,8 @@ namespace xsimd
                 return __riscv_vset(tmp, 1, hi);
             }
 
-            template <class T, size_t W, std::enable_if_t<W<types::detail::rvv_width_m1, int>::type = 0> D_INLINE rvv_reg_t<T, W * 2> rvvabut(rvv_reg_t<T, W> const& lo, rvv_reg_t<T, W> const& hi) noexcept
+            template <class T, size_t W, std::enable_if_t<W < types::detail::rvv_width_m1, int> = 0>
+            XSIMD_INLINE rvv_reg_t<T, W * 2> rvvabut(rvv_reg_t<T, W> const& lo, rvv_reg_t<T, W> const& hi) noexcept
             {
                 return __riscv_vslideup(lo, hi, lo.vl, lo.vl * 2);
             }
@@ -540,7 +541,7 @@ namespace xsimd
                 typename rvv_reg_t<T, W>::register_type tmp = vv;
                 return tmp;
             }
-            template <class T, size_t W, std::enable_if_t<W<types::detail::rvv_width_m1, int>::type = 0> reg_t<T, W> rvvget_hi(rvv_reg_t<T, W * 2> const& vv) noexcept
+            template <class T, size_t W, std::enable_if_t<W<types::detail::rvv_width_m1, int> = 0> reg_t<T, W> rvvget_hi(rvv_reg_t<T, W * 2> const& vv) noexcept
             {
                 return __riscv_vslidedown(vv, vv.vl / 2, vv.vl);
             }

Original file line number	Diff line number	Diff line change
`@@ -515,7 +515,8 @@ namespace xsimd`
`515`	`515`	`return __riscv_vset(tmp, 1, hi);`
`516`	`516`	`}`
`517`	`517`
`518`		`- template <class T, size_t W, std::enable_if_t<W<types::detail::rvv_width_m1, int>::type = 0> D_INLINE rvv_reg_t<T, W * 2> rvvabut(rvv_reg_t<T, W> const& lo, rvv_reg_t<T, W> const& hi) noexcept`
	`518`	`+ template <class T, size_t W, std::enable_if_t<W < types::detail::rvv_width_m1, int> = 0>`
	`519`	`+ XSIMD_INLINE rvv_reg_t<T, W * 2> rvvabut(rvv_reg_t<T, W> const& lo, rvv_reg_t<T, W> const& hi) noexcept`
`519`	`520`	`{`
`520`	`521`	`return __riscv_vslideup(lo, hi, lo.vl, lo.vl * 2);`
`521`	`522`	`}`
`@@ -540,7 +541,7 @@ namespace xsimd`
`540`	`541`	`typename rvv_reg_t<T, W>::register_type tmp = vv;`
`541`	`542`	`return tmp;`
`542`	`543`	`}`
`543`		`- template <class T, size_t W, std::enable_if_t<W<types::detail::rvv_width_m1, int>::type = 0> reg_t<T, W> rvvget_hi(rvv_reg_t<T, W * 2> const& vv) noexcept`
	`544`	`+ template <class T, size_t W, std::enable_if_t<W<types::detail::rvv_width_m1, int> = 0> reg_t<T, W> rvvget_hi(rvv_reg_t<T, W * 2> const& vv) noexcept`
`544`	`545`	`{`
`545`	`546`	`return __riscv_vslidedown(vv, vv.vl / 2, vv.vl);`
`546`	`547`	`}`