@@ -917,10 +917,22 @@ namespace xsimd
917917 return dispatcher.apply (register_type (lhs), register_type (rhs));
918918 }
919919
920- template <class A , class T , detail::enable_sized_integral_t <T, 8 > = 0 >
920+ template <class A , class T , detail::enable_sized_unsigned_t <T, 8 > = 0 >
921921 XSIMD_INLINE batch_bool<T, A> eq (batch<T, A> const & lhs, batch<T, A> const & rhs, requires_arch<neon>) noexcept
922922 {
923- return batch_bool<T, A>({ lhs.get (0 ) == rhs.get (0 ), lhs.get (1 ) == rhs.get (1 ) });
923+ auto eq32 = vceqq_u32 (vreinterpretq_u64_u32 (lhs), vreinterpretq_u64_u32 (rhs));
924+ auto rev32 = vrev64q_u32 (eq32);
925+ auto eq64 = vandq_u32 (eq32, rev32);
926+ return batch_bool<T, A>(vreinterpretq_u32_u64 (eq64));
927+ }
928+
929+ template <class A , class T , detail::enable_sized_signed_t <T, 8 > = 0 >
930+ XSIMD_INLINE batch_bool<T, A> eq (batch<T, A> const & lhs, batch<T, A> const & rhs, requires_arch<neon>) noexcept
931+ {
932+ auto eq32 = vceqq_u32 (vreinterpretq_s64_u32 (lhs), vreinterpretq_s64_u32 (rhs));
933+ auto rev32 = vrev64q_u32 (eq32);
934+ auto eq64 = vandq_u32 (eq32, rev32);
935+ return batch_bool<T, A>(vreinterpretq_u32_s64 (eq64));
924936 }
925937
926938 template <class A , class T , detail::enable_sized_integral_t <T, 8 > = 0 >
0 commit comments