drivers: dm8806: smi bus error check

SMI bus error check mechanism is preventing the host SMI bus to be
interferred by noise on board level. Current implementation is checking
if data which is writing to/reading from the PHY has correct CRC sum.
If not, then writing/rading process is repeated by the number of
attempts defined in the KConfig. If repeating transmission will fail
by the numbers of ettemps defined in KConfing, drivers returns an
error.

Signed-off-by: Robert Slawinski <[email protected]>

Author: robi251

drivers/ethernet/phy/Kconfig.dm8806

@@ -46,4 +46,25 @@ config PHY_DM8806_THREAD_STACK_SIZE
 	help
 	  Stack size of thread used by the driver to handle interrupts.
 
-endif # PHY_DM8806_TRIGGER
+config PHY_DM8806_SMI_BUS_CHECK
+	bool "Host SMI bus error check function"
+	default y
+	help
+	  This functionality prevents the host SMI bus to be interferered by the
+	  noise on board-level. During write procedure, the written value in
+	  register will be applied until the correct checksum is written. In read
+	  procedure, the hardware calculated checksum is compared with the software
+	  calculated one to detect correctness of received data.
+
+config PHY_DM8806_SMI_BUS_CHECK_REPETITION
+	int "SMI bus transmission repetitions"
+	depends on PHY_DM8806_SMI_BUS_CHECK
+	default 5
+	help
+	  The numbers of SMI bus transmission repetition in case if CRC checksum
+	  fails during read or write. After this numbers of repetition, the reading
+	  message is dropped and will not be passed to the system. In write
+	  procedure, the written value in register will be applied until the correct
+	  checksum is written to the PHY register.
+
+endif # PHY_DM8806