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arsenmarsenm
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AArch64: Convert tests to opaque pointers (llvm#167442)
1 parent bdf37f4 commit 19d472f

12 files changed

+125
-125
lines changed

‎llvm/test/CodeGen/AArch64/aarch64-reassociate-accumulators.ll‎

Lines changed: 28 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -24,8 +24,8 @@ loop:
2424
%acc_phi = phi <8 x i16> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
2525
%ptr1_i = getelementptr i8, ptr %ptr1, i32 %i
2626
%ptr2_i = getelementptr i8, ptr %ptr2, i32 %i
27-
%a = load <8 x i8>, <8 x i8>* %ptr1_i, align 1
28-
%b = load <8 x i8>, <8 x i8>* %ptr2_i, align 1
27+
%a = load <8 x i8>, ptr %ptr1_i, align 1
28+
%b = load <8 x i8>, ptr %ptr2_i, align 1
2929
%vabd = call <8 x i8> @llvm.aarch64.neon.sabd.v8i8(<8 x i8> %a, <8 x i8> %b)
3030
%vabd_ext = zext <8 x i8> %vabd to <8 x i16>
3131
%acc_next = add <8 x i16> %vabd_ext, %acc_phi
@@ -65,8 +65,8 @@ loop:
6565
%acc_phi = phi <4 x i32> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
6666
%ptr1_i = getelementptr i16, ptr %ptr1, i32 %i
6767
%ptr2_i = getelementptr i16, ptr %ptr2, i32 %i
68-
%a = load <4 x i16>, <4 x i16>* %ptr1_i, align 1
69-
%b = load <4 x i16>, <4 x i16>* %ptr2_i, align 1
68+
%a = load <4 x i16>, ptr %ptr1_i, align 1
69+
%b = load <4 x i16>, ptr %ptr2_i, align 1
7070
%vabd = tail call <4 x i16> @llvm.aarch64.neon.sabd.v4i16(<4 x i16> %a, <4 x i16> %b)
7171
%vmov = zext <4 x i16> %vabd to <4 x i32>
7272
%acc_next = add <4 x i32> %vmov, %acc_phi
@@ -116,8 +116,8 @@ loop:
116116
%acc_phi_lo = phi <8 x i16> [ zeroinitializer, %entry ], [ %acc_next_lo, %loop ]
117117
%ptr1_i = getelementptr i8, ptr %ptr1, i32 %i
118118
%ptr2_i = getelementptr i8, ptr %ptr2, i32 %i
119-
%a = load <16 x i8>, <16 x i8>* %ptr1_i, align 1
120-
%b = load <16 x i8>, <16 x i8>* %ptr2_i, align 1
119+
%a = load <16 x i8>, ptr %ptr1_i, align 1
120+
%b = load <16 x i8>, ptr %ptr2_i, align 1
121121
%a_hi = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
122122
%b_hi = shufflevector <16 x i8> %b, <16 x i8> zeroinitializer, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
123123
%a_lo = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
@@ -160,8 +160,8 @@ loop:
160160
%acc_phi = phi <4 x i32> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
161161
%ptr1_i = getelementptr i32, ptr %ptr1, i32 %i
162162
%ptr2_i = getelementptr i32, ptr %ptr2, i32 %i
163-
%a = load <4 x i32>, <4 x i32>* %ptr1_i, align 1
164-
%b = load <4 x i32>, <4 x i32>* %ptr2_i, align 1
163+
%a = load <4 x i32>, ptr %ptr1_i, align 1
164+
%b = load <4 x i32>, ptr %ptr2_i, align 1
165165
%vabd = tail call <4 x i32> @llvm.aarch64.neon.uabd.v4i32(<4 x i32> %a, <4 x i32> %b)
166166
%acc_next = add <4 x i32> %acc_phi, %vabd
167167
%next_i = add i32 %i, 4
@@ -198,8 +198,8 @@ loop:
198198
; Load values from ptr1 and ptr2
199199
%ptr1_i = getelementptr i32, ptr %ptr1, i32 %i
200200
%ptr2_i = getelementptr i32, ptr %ptr2, i32 %i
201-
%a = load <4 x i32>, <4 x i32>* %ptr1_i, align 1
202-
%b = load <4 x i32>, <4 x i32>* %ptr2_i, align 1
201+
%a = load <4 x i32>, ptr %ptr1_i, align 1
202+
%b = load <4 x i32>, ptr %ptr2_i, align 1
203203
; Perform the intrinsic operation
204204
%vabd = tail call <4 x i32> @llvm.aarch64.neon.sabd.v4i32(<4 x i32> %a, <4 x i32> %b)
205205
%acc_next = add <4 x i32> %acc_phi, %vabd
@@ -237,8 +237,8 @@ loop:
237237
%acc_phi = phi <2 x i32> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
238238
%ptr1_i = getelementptr i32, ptr %ptr1, i32 %i
239239
%ptr2_i = getelementptr i32, ptr %ptr2, i32 %i
240-
%a = load <2 x i32>, <2 x i32>* %ptr1_i, align 1
241-
%b = load <2 x i32>, <2 x i32>* %ptr2_i, align 1
240+
%a = load <2 x i32>, ptr %ptr1_i, align 1
241+
%b = load <2 x i32>, ptr %ptr2_i, align 1
242242
%vabd = tail call <2 x i32> @llvm.aarch64.neon.uabd.v2i32(<2 x i32> %a, <2 x i32> %b)
243243
%acc_next = add <2 x i32> %acc_phi, %vabd
244244
%next_i = add i32 %i, 2
@@ -272,8 +272,8 @@ loop:
272272
%acc_phi = phi <8 x i8> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
273273
%ptr1_i = getelementptr i8, ptr %ptr1, i32 %i
274274
%ptr2_i = getelementptr i8, ptr %ptr2, i32 %i
275-
%a = load <8 x i8>, <8 x i8>* %ptr1_i, align 1
276-
%b = load <8 x i8>, <8 x i8>* %ptr2_i, align 1
275+
%a = load <8 x i8>, ptr %ptr1_i, align 1
276+
%b = load <8 x i8>, ptr %ptr2_i, align 1
277277
%vabd = tail call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> %a, <8 x i8> %b)
278278
%acc_next = add <8 x i8> %acc_phi, %vabd
279279
%next_i = add i32 %i, 8
@@ -307,8 +307,8 @@ loop:
307307
%acc_phi = phi <16 x i8> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
308308
%ptr1_i = getelementptr i8, ptr %ptr1, i32 %i
309309
%ptr2_i = getelementptr i8, ptr %ptr2, i32 %i
310-
%a = load <16 x i8>, <16 x i8>* %ptr1_i, align 1
311-
%b = load <16 x i8>, <16 x i8>* %ptr2_i, align 1
310+
%a = load <16 x i8>, ptr %ptr1_i, align 1
311+
%b = load <16 x i8>, ptr %ptr2_i, align 1
312312
%vabd = tail call <16 x i8> @llvm.aarch64.neon.uabd.v16i8(<16 x i8> %a, <16 x i8> %b)
313313
%acc_next = add <16 x i8> %acc_phi, %vabd
314314
%next_i = add i32 %i, 16
@@ -342,8 +342,8 @@ loop:
342342
%acc_phi = phi <8 x i16> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
343343
%ptr1_i = getelementptr i16, ptr %ptr1, i32 %i
344344
%ptr2_i = getelementptr i16, ptr %ptr2, i32 %i
345-
%a = load <8 x i16>, <8 x i16>* %ptr1_i, align 1
346-
%b = load <8 x i16>, <8 x i16>* %ptr2_i, align 1
345+
%a = load <8 x i16>, ptr %ptr1_i, align 1
346+
%b = load <8 x i16>, ptr %ptr2_i, align 1
347347
%vabd = tail call <8 x i16> @llvm.aarch64.neon.uabd.v8i16(<8 x i16> %a, <8 x i16> %b)
348348
%acc_next = add <8 x i16> %acc_phi, %vabd
349349
%next_i = add i32 %i, 8
@@ -377,8 +377,8 @@ loop:
377377
%acc_phi = phi <8 x i8> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
378378
%ptr1_i = getelementptr i8, ptr %ptr1, i32 %i
379379
%ptr2_i = getelementptr i8, ptr %ptr2, i32 %i
380-
%a = load <8 x i8>, <8 x i8>* %ptr1_i, align 1
381-
%b = load <8 x i8>, <8 x i8>* %ptr2_i, align 1
380+
%a = load <8 x i8>, ptr %ptr1_i, align 1
381+
%b = load <8 x i8>, ptr %ptr2_i, align 1
382382
%vabd = tail call <8 x i8> @llvm.aarch64.neon.sabd.v8i8(<8 x i8> %a, <8 x i8> %b)
383383
%acc_next = add <8 x i8> %acc_phi, %vabd
384384
%next_i = add i32 %i, 8
@@ -411,8 +411,8 @@ loop:
411411
%acc_phi = phi <4 x i16> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
412412
%ptr1_i = getelementptr i16, ptr %ptr1, i32 %i
413413
%ptr2_i = getelementptr i16, ptr %ptr2, i32 %i
414-
%a = load <4 x i16>, <4 x i16>* %ptr1_i, align 1
415-
%b = load <4 x i16>, <4 x i16>* %ptr2_i, align 1
414+
%a = load <4 x i16>, ptr %ptr1_i, align 1
415+
%b = load <4 x i16>, ptr %ptr2_i, align 1
416416
%vabd = tail call <4 x i16> @llvm.aarch64.neon.sabd.v4i16(<4 x i16> %a, <4 x i16> %b)
417417
%acc_next = add <4 x i16> %acc_phi, %vabd
418418
%next_i = add i32 %i, 4
@@ -445,8 +445,8 @@ loop:
445445
%acc_phi = phi <8 x i16> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
446446
%ptr1_i = getelementptr i16, ptr %ptr1, i32 %i
447447
%ptr2_i = getelementptr i16, ptr %ptr2, i32 %i
448-
%a = load <8 x i16>, <8 x i16>* %ptr1_i, align 1
449-
%b = load <8 x i16>, <8 x i16>* %ptr2_i, align 1
448+
%a = load <8 x i16>, ptr %ptr1_i, align 1
449+
%b = load <8 x i16>, ptr %ptr2_i, align 1
450450
%vabd = tail call <8 x i16> @llvm.aarch64.neon.sabd.v8i16(<8 x i16> %a, <8 x i16> %b)
451451
%acc_next = add <8 x i16> %acc_phi, %vabd
452452
%next_i = add i32 %i, 8
@@ -480,8 +480,8 @@ loop:
480480
%acc_phi = phi <8 x i16> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
481481
%ptr1_i = getelementptr i8, ptr %ptr1, i32 %i
482482
%ptr2_i = getelementptr i8, ptr %ptr2, i32 %i
483-
%a = load <8 x i8>, <8 x i8>* %ptr1_i, align 1
484-
%b = load <8 x i8>, <8 x i8>* %ptr2_i, align 1
483+
%a = load <8 x i8>, ptr %ptr1_i, align 1
484+
%b = load <8 x i8>, ptr %ptr2_i, align 1
485485
%vabd = tail call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> %a, <8 x i8> %b)
486486
%vmov = zext <8 x i8> %vabd to <8 x i16>
487487
%acc_next = add <8 x i16> %vmov, %acc_phi
@@ -516,8 +516,8 @@ loop:
516516
%acc_phi = phi <4 x i32> [ zeroinitializer, %entry ], [ %acc_next, %loop ]
517517
%ptr1_i = getelementptr i16, ptr %ptr1, i32 %i
518518
%ptr2_i = getelementptr i16, ptr %ptr2, i32 %i
519-
%a = load <4 x i16>, <4 x i16>* %ptr1_i, align 1
520-
%b = load <4 x i16>, <4 x i16>* %ptr2_i, align 1
519+
%a = load <4 x i16>, ptr %ptr1_i, align 1
520+
%b = load <4 x i16>, ptr %ptr2_i, align 1
521521
%vabd = tail call <4 x i16> @llvm.aarch64.neon.uabd.v4i16(<4 x i16> %a, <4 x i16> %b)
522522
%vmov = zext <4 x i16> %vabd to <4 x i32>
523523
%acc_next = add <4 x i32> %vmov, %acc_phi

‎llvm/test/CodeGen/AArch64/cgdata-merge-local.ll‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -54,9 +54,9 @@
5454
define i32 @f1(i32 %a) {
5555
entry:
5656
%idxprom = sext i32 %a to i64
57-
%arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i64 0, i64 %idxprom
58-
%0 = load i32, i32* %arrayidx, align 4
59-
%1 = load volatile i32, i32* @g1, align 4
57+
%arrayidx = getelementptr inbounds [0 x i32], ptr @g, i64 0, i64 %idxprom
58+
%0 = load i32, ptr %arrayidx, align 4
59+
%1 = load volatile i32, ptr @g1, align 4
6060
%mul = mul nsw i32 %1, %0
6161
%add = add nsw i32 %mul, 1
6262
ret i32 %add
@@ -65,9 +65,9 @@ entry:
6565
define i32 @f2(i32 %a) {
6666
entry:
6767
%idxprom = sext i32 %a to i64
68-
%arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i64 0, i64 %idxprom
69-
%0 = load i32, i32* %arrayidx, align 4
70-
%1 = load volatile i32, i32* @g2, align 4
68+
%arrayidx = getelementptr inbounds [0 x i32], ptr @g, i64 0, i64 %idxprom
69+
%0 = load i32, ptr %arrayidx, align 4
70+
%1 = load volatile i32, ptr @g2, align 4
7171
%mul = mul nsw i32 %1, %0
7272
%add = add nsw i32 %mul, 1
7373
ret i32 %add

‎llvm/test/CodeGen/AArch64/cgdata-merge-no-params.ll‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -19,9 +19,9 @@
1919
define i32 @f1(i32 %a) {
2020
entry:
2121
%idxprom = sext i32 %a to i64
22-
%arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i64 0, i64 %idxprom
23-
%0 = load i32, i32* %arrayidx, align 4
24-
%1 = load volatile i32, i32* @g1, align 4
22+
%arrayidx = getelementptr inbounds [0 x i32], ptr @g, i64 0, i64 %idxprom
23+
%0 = load i32, ptr %arrayidx, align 4
24+
%1 = load volatile i32, ptr @g1, align 4
2525
%mul = mul nsw i32 %1, %0
2626
%add = add nsw i32 %mul, 1
2727
ret i32 %add
@@ -30,9 +30,9 @@ entry:
3030
define i32 @f2(i32 %a) {
3131
entry:
3232
%idxprom = sext i32 %a to i64
33-
%arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i64 0, i64 %idxprom
34-
%0 = load i32, i32* %arrayidx, align 4
35-
%1 = load volatile i32, i32* @g1, align 4
33+
%arrayidx = getelementptr inbounds [0 x i32], ptr @g, i64 0, i64 %idxprom
34+
%0 = load i32, ptr %arrayidx, align 4
35+
%1 = load volatile i32, ptr @g1, align 4
3636
%mul = mul nsw i32 %1, %0
3737
%add = add nsw i32 %mul, 1
3838
ret i32 %add

‎llvm/test/CodeGen/AArch64/cgdata-no-merge-unnamed.ll‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -12,9 +12,9 @@
1212
define i32 @0(i32 %a) {
1313
entry:
1414
%idxprom = sext i32 %a to i64
15-
%arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i64 0, i64 %idxprom
16-
%0 = load i32, i32* %arrayidx, align 4
17-
%1 = load volatile i32, i32* @g1, align 4
15+
%arrayidx = getelementptr inbounds [0 x i32], ptr @g, i64 0, i64 %idxprom
16+
%0 = load i32, ptr %arrayidx, align 4
17+
%1 = load volatile i32, ptr @g1, align 4
1818
%mul = mul nsw i32 %1, %0
1919
%add = add nsw i32 %mul, 1
2020
ret i32 %add
@@ -23,9 +23,9 @@ entry:
2323
define i32 @1(i32 %a) {
2424
entry:
2525
%idxprom = sext i32 %a to i64
26-
%arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i64 0, i64 %idxprom
27-
%0 = load i32, i32* %arrayidx, align 4
28-
%1 = load volatile i32, i32* @g2, align 4
26+
%arrayidx = getelementptr inbounds [0 x i32], ptr @g, i64 0, i64 %idxprom
27+
%0 = load i32, ptr %arrayidx, align 4
28+
%1 = load volatile i32, ptr @g2, align 4
2929
%mul = mul nsw i32 %1, %0
3030
%add = add nsw i32 %mul, 1
3131
ret i32 %add

‎llvm/test/CodeGen/AArch64/divrem.ll‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22

33
; SDIVREM/UDIVREM DAG nodes are generated but expanded when lowering and
44
; should not generate select error.
5-
define <2 x i32> @test_udivrem(<2 x i32> %x, < 2 x i32> %y, < 2 x i32>* %z) {
5+
define <2 x i32> @test_udivrem(<2 x i32> %x, < 2 x i32> %y, ptr %z) {
66
; CHECK-LABEL: test_udivrem
77
; CHECK-DAG: udivrem
88
; CHECK-NOT: LLVM ERROR: Cannot select
@@ -12,10 +12,10 @@ define <2 x i32> @test_udivrem(<2 x i32> %x, < 2 x i32> %y, < 2 x i32>* %z) {
1212
ret <2 x i32> %1
1313
}
1414

15-
define <4 x i32> @test_sdivrem(<4 x i32> %x, ptr %y) {
15+
define <4 x i32> @test_sdivrem(<4 x i32> %x, ptr %y) {
1616
; CHECK-LABEL: test_sdivrem
1717
; CHECK-DAG: sdivrem
18-
%div = sdiv <4 x i32> %x, < i32 20, i32 20, i32 20, i32 20 >
18+
%div = sdiv <4 x i32> %x, < i32 20, i32 20, i32 20, i32 20 >
1919
store <4 x i32> %div, ptr %y
2020
%1 = srem <4 x i32> %x, < i32 20, i32 20, i32 20, i32 20 >
2121
ret <4 x i32> %1

‎llvm/test/CodeGen/AArch64/ldp-stp-scaled-unscaled-pairs.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -85,7 +85,7 @@ define i64 @test_ldrsw_ldursw(ptr %p) #0 {
8585
; CHECK-NEXT: add.2d v0, v[[V0]], v[[V1]]
8686
; CHECK-NEXT: ret
8787
define <2 x i64> @test_ldrq_ldruq_invalidoffset(ptr %p) #0 {
88-
%tmp1 = load <2 x i64>, < 2 x i64>* %p, align 8
88+
%tmp1 = load <2 x i64>, ptr %p, align 8
8989
%add.ptr2 = getelementptr inbounds i64, ptr %p, i64 3
9090
%tmp2 = load <2 x i64>, ptr %add.ptr2, align 8
9191
%add = add nsw <2 x i64> %tmp1, %tmp2

‎llvm/test/CodeGen/AArch64/machine-outliner-iterative.mir‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -6,17 +6,17 @@
66
#
77
#; define void @"$s12"(...) { define i64 @"$s5” (...) { define void @"$s13"(...) {
88
# ... ... ...
9-
# %8 = load i1, i1* %7 %8 = load i1, i1* %7
10-
# %9 = load i4, i4*, %6 %9 = load i4, i4*, %6 %9 = load i4, i4*, %6
11-
# store i4 %9, i4* %5 store i4 %9, i4* %5 store i4 %9, i4* %5
9+
# %8 = load i1, ptr %7 %8 = load i1, ptr %7
10+
# %9 = load i4, ptr, %6 %9 = load i4, ptr, %6 %9 = load i4, ptr, %6
11+
# store i4 %9, ptr %5 store i4 %9, ptr %5 store i4 %9, ptr %5
1212
# ... ... ...
1313
# } } }
1414
#
1515
# After machine outliner (1st time)
1616
#
1717
# define void @"$s12"(...) { define i64 @"$s5” (...) { define void @"$s13"(...) {
1818
# ... ... ...
19-
# %8 = load i1, i1* %7 %8 = load i1, i1* %7
19+
# %8 = load i1, ptr %7 %8 = load i1, ptr %7
2020
# call void @outlined_function_1_1 call void @outlined_function_1_1 call void @outlined_function_1_1
2121
# ... ... ...
2222
# } } }

‎llvm/test/CodeGen/AArch64/misched-fusion-cmp-bcc.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -15,10 +15,10 @@
1515
; RUN: llc %s -o - -O0 -mtriple=aarch64-unknown -mcpu=ampere1b | FileCheck %s
1616

1717

18-
define void @test_cmp_bcc_fusion(i32 %x, i32 %y, i32* %arr) {
18+
define void @test_cmp_bcc_fusion(i32 %x, i32 %y, ptr %arr) {
1919
entry:
2020
%cmp = icmp eq i32 %x, %y
21-
store i32 %x, i32* %arr, align 4
21+
store i32 %x, ptr %arr, align 4
2222
br i1 %cmp, label %if_true, label %if_false
2323

2424
if_true:

‎llvm/test/CodeGen/AArch64/no-quad-ldp-stp.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ define void @test_nopair_st(ptr %ptr, <2 x double> %v1, <2 x double> %v2) {
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; SLOW-NOT: ldp
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; FAST: ldp
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define <2 x i64> @test_nopair_ld(ptr %p) {
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%tmp1 = load <2 x i64>, < 2 x i64>* %p, align 8
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%tmp1 = load <2 x i64>, ptr %p, align 8
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%add.ptr2 = getelementptr inbounds i64, ptr %p, i64 2
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%tmp2 = load <2 x i64>, ptr %add.ptr2, align 8
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%add = add nsw <2 x i64> %tmp1, %tmp2

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