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optimize f32x4 xyz
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cidre/src/simd.rs

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@@ -334,6 +334,11 @@ impl Default for f32x4 {
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#[cfg(target_arch = "aarch64")]
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impl f32x4 {
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#[inline]
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pub fn xyz(&self) -> f32x3 {
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f32x3(unsafe { std::arch::aarch64::vsetq_lane_f32::<3>(0.0, self.0) })
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}
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pub fn x(&self) -> f32 {
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unsafe { std::arch::aarch64::vgetq_lane_f32::<0>(self.0) }
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}
@@ -1879,6 +1884,12 @@ mod tests {
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assert_eq!(a.dot(&b), 70.0);
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}
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#[test]
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fn f32x4_xyz() {
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let v = f32x4::with_xyzw(1.0, 2.0, 3.0, 4.0);
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assert_eq!(v.xyz(), f32x3::with_xyz(1.0, 2.0, 3.0));
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}
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#[test]
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fn f32x4_len_sq() {
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let a = f32x4::with_xyzw(1.0, 2.0, 3.0, 4.0);

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