diff --git a/CMSIS/Core/Include/cmsis_iccarm.h b/CMSIS/Core/Include/cmsis_iccarm.h
index 65b824b..e2687ba 100644
--- a/CMSIS/Core/Include/cmsis_iccarm.h
+++ b/CMSIS/Core/Include/cmsis_iccarm.h
@@ -309,13 +309,22 @@ __STATIC_FORCEINLINE void __TZ_set_STACKSEAL_S (uint32_t* stackTop) {
 
   #include "iccarm_builtin.h"
 
-  #define __disable_fault_irq __iar_builtin_disable_fiq
   #define __disable_irq       __iar_builtin_disable_interrupt
-  #define __enable_fault_irq  __iar_builtin_enable_fiq
   #define __enable_irq        __iar_builtin_enable_interrupt
   #define __arm_rsr           __iar_builtin_rsr
   #define __arm_wsr           __iar_builtin_wsr
 
+  #if (defined(__ARM_ARCH_ISA_THUMB) && __ARM_ARCH_ISA_THUMB >= 2)
+    __IAR_FT void __disable_fault_irq()
+    {
+      __ASM volatile ("CPSID F" ::: "memory");
+    }
+
+    __IAR_FT void __enable_fault_irq()
+    {
+      __ASM volatile ("CPSIE F" ::: "memory");
+    }
+  #endif
 
   #define __get_APSR()                (__arm_rsr("APSR"))
   #define __get_BASEPRI()             (__arm_rsr("BASEPRI"))
@@ -639,9 +648,15 @@ __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
     }
 
 
-    #define __enable_fault_irq  __enable_fiq
-    #define __disable_fault_irq __disable_fiq
+    __IAR_FT void __disable_fault_irq()
+    {
+      __ASM volatile ("CPSID F" ::: "memory");
+    }
 
+    __IAR_FT void __enable_fault_irq()
+    {
+      __ASM volatile ("CPSIE F" ::: "memory");
+    }
 
   #endif /* (__CORTEX_M >= 0x03) */