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| 1 | +# Multilib target configurations |
| 2 | +MULTILIB_SRC_ARCH = rv32i_zicsr_zifencei |
| 3 | +MULTILIB_SRC_ARCH += rv32im_zicsr_zifencei |
| 4 | +MULTILIB_SRC_ARCH += rv32im_zicsr_zifencei_zba_zbb_zbc_zbs |
| 5 | +MULTILIB_SRC_ARCH += rv32ima_zicsr_zifencei |
| 6 | +MULTILIB_SRC_ARCH += rv32ima_zicsr_zifencei_zba_zbb_zbc_zbs |
| 7 | +MULTILIB_SRC_ARCH += rv32imac_zicsr_zifencei |
| 8 | +MULTILIB_SRC_ARCH += rv32imac_zicsr_zifencei_zba_zbb_zbc_zbs |
| 9 | +MULTILIB_SRC_ARCH += rv32imafc_zicsr_zifencei |
| 10 | +MULTILIB_SRC_ARCH += rv32imfc_zicsr_zifencei |
| 11 | +MULTILIB_SRC_ARCH += rv32imafd_zicsr_zifencei |
| 12 | +MULTILIB_SRC_ARCH += rv32imafdc_zicsr_zifencei |
| 13 | +MULTILIB_SRC_ARCH += rv32imc_zicsr_zifencei |
| 14 | +MULTILIB_SRC_ARCH += rv32imc_zicsr_zifencei_zba_zbb_zbc_zbs |
| 15 | +MULTILIB_SRC_ARCH += rv32ia_zicsr_zifencei |
| 16 | +MULTILIB_SRC_ARCH += rv32iac_zicsr_zifencei |
| 17 | +MULTILIB_SRC_ARCH += rv32iafc_zicsr_zifencei |
| 18 | +MULTILIB_SRC_ARCH += rv32if_zicsr_zifencei |
| 19 | +MULTILIB_SRC_ARCH += rv32ic_zicsr_zifencei |
| 20 | +MULTILIB_SRC_ARCH += rv32g |
| 21 | +MULTILIB_SRC_ARCH += rv32gc |
| 22 | +MULTILIB_SRC_ARCH += rv32e_zicsr_zifencei |
| 23 | +MULTILIB_SRC_ARCH += rv32em_zicsr_zifencei |
| 24 | +MULTILIB_SRC_ARCH += rv32ema_zicsr_zifencei |
| 25 | +MULTILIB_SRC_ARCH += rv32emc_zicsr_zifencei |
| 26 | +MULTILIB_SRC_ARCH += rv32emc_zicsr_zifencei_zba_zbb_zbc_zbs |
| 27 | +MULTILIB_SRC_ARCH += rv32emc_zicsr |
| 28 | +MULTILIB_SRC_ARCH += rv32emc_zicsr_zba_zbb_zbc_zbs |
| 29 | +MULTILIB_SRC_ARCH += rv32emac_zicsr_zifencei |
| 30 | +MULTILIB_SRC_ARCH += rv32emac_zicsr_zifencei_zba_zbb_zbc_zbs |
| 31 | +MULTILIB_SRC_ARCH += rv32ea_zicsr_zifencei |
| 32 | +MULTILIB_SRC_ARCH += rv32eac_zicsr_zifencei |
| 33 | +MULTILIB_SRC_ARCH += rv32ec_zicsr_zifencei |
| 34 | +MULTILIB_SRC_ARCH += rv64i_zicsr_zifencei |
| 35 | +MULTILIB_SRC_ARCH += rv64im_zicsr_zifencei |
| 36 | +MULTILIB_SRC_ARCH += rv64im_zicsr_zifencei_zba_zbb_zbc_zbs |
| 37 | +MULTILIB_SRC_ARCH += rv64ima_zicsr_zifencei |
| 38 | +MULTILIB_SRC_ARCH += rv64ima_zicsr_zifencei_zba_zbb_zbc_zbs |
| 39 | +MULTILIB_SRC_ARCH += rv64imac_zicsr_zifencei |
| 40 | +MULTILIB_SRC_ARCH += rv64imac_zicsr_zifencei_zba_zbb_zbc_zbs |
| 41 | +MULTILIB_SRC_ARCH += rv64imafd_zicsr_zifencei |
| 42 | +MULTILIB_SRC_ARCH += rv64imafdc_zicsr_zifencei |
| 43 | +MULTILIB_SRC_ARCH += rv64imc_zicsr_zifencei |
| 44 | +MULTILIB_SRC_ARCH += rv64imc_zicsr_zifencei_zba_zbb_zbc_zbs |
| 45 | +MULTILIB_SRC_ARCH += rv64imfc_zicsr_zifencei |
| 46 | +MULTILIB_SRC_ARCH += rv64imfc_zicsr_zifencei_zba_zbb_zbc_zbs |
| 47 | +MULTILIB_SRC_ARCH += rv64ia_zicsr_zifencei |
| 48 | +MULTILIB_SRC_ARCH += rv64iac_zicsr_zifencei |
| 49 | +MULTILIB_SRC_ARCH += rv64ic_zicsr_zifencei |
| 50 | +MULTILIB_SRC_ARCH += rv64g |
| 51 | +MULTILIB_SRC_ARCH += rv64gc |
| 52 | + |
| 53 | +MULTILIB_SRC_ABI = ilp32 |
| 54 | +MULTILIB_SRC_ABI += ilp32f |
| 55 | +MULTILIB_SRC_ABI += ilp32d |
| 56 | +MULTILIB_SRC_ABI += ilp32e |
| 57 | +MULTILIB_SRC_ABI += lp64 |
| 58 | +MULTILIB_SRC_ABI += lp64f |
| 59 | +MULTILIB_SRC_ABI += lp64d |
| 60 | + |
| 61 | +MULTILIB_SRC_MCMODEL = medany |
| 62 | + |
| 63 | +# Multilib build configurations |
| 64 | +MULTILIB_REQUIRED = \ |
| 65 | +march=rv32i_zicsr_zifencei/mabi=ilp32 \ |
| 66 | +march=rv32im_zicsr_zifencei/mabi=ilp32 \ |
| 67 | +march=rv32im_zicsr_zifencei_zba_zbb_zbc_zbs/mabi=ilp32 \ |
| 68 | +march=rv32imac_zicsr_zifencei/mabi=ilp32 \ |
| 69 | +march=rv32imafc_zicsr_zifencei/mabi=ilp32f \ |
| 70 | +march=rv32imfc_zicsr_zifencei/mabi=ilp32f \ |
| 71 | +march=rv32imafd_zicsr_zifencei/mabi=ilp32d \ |
| 72 | +march=rv32if_zicsr_zifencei/mabi=ilp32f \ |
| 73 | +march=rv32e_zicsr_zifencei/mabi=ilp32e \ |
| 74 | +march=rv32em_zicsr_zifencei/mabi=ilp32e \ |
| 75 | +march=rv32emc_zicsr_zifencei/mabi=ilp32e \ |
| 76 | +march=rv32emc_zicsr_zifencei_zba_zbb_zbc_zbs/mabi=ilp32e \ |
| 77 | +march=rv32emc_zicsr/mabi=ilp32e \ |
| 78 | +march=rv32emc_zicsr_zba_zbb_zbc_zbs/mabi=ilp32e \ |
| 79 | +march=rv64i_zicsr_zifencei/mabi=lp64/mcmodel=medany \ |
| 80 | +march=rv64im_zicsr_zifencei/mabi=lp64/mcmodel=medany \ |
| 81 | +march=rv64im_zicsr_zifencei_zba_zbb_zbc_zbs/mabi=lp64/mcmodel=medany \ |
| 82 | +march=rv64imac_zicsr_zifencei/mabi=lp64/mcmodel=medany \ |
| 83 | +march=rv64imac_zicsr_zifencei_zba_zbb_zbc_zbs/mabi=lp64/mcmodel=medany \ |
| 84 | +march=rv64imafdc_zicsr_zifencei/mabi=lp64d/mcmodel=medany \ |
| 85 | +march=rv64imafd_zicsr_zifencei/mabi=lp64d/mcmodel=medany \ |
| 86 | +march=rv64imfc_zicsr_zifencei/mabi=lp64f/mcmodel=medany \ |
| 87 | +march=rv64imfc_zicsr_zifencei_zba_zbb_zbc_zbs/mabi=lp64f/mcmodel=medany |
| 88 | + |
| 89 | +# Multilib alternate mapping |
| 90 | +MULTILIB_REUSE = \ |
| 91 | +march.rv32i_zicsr_zifencei/mabi.ilp32=march.rv32ia_zicsr_zifencei/mabi.ilp32 \ |
| 92 | +march.rv32i_zicsr_zifencei/mabi.ilp32=march.rv32iac_zicsr_zifencei/mabi.ilp32 \ |
| 93 | +march.rv32i_zicsr_zifencei/mabi.ilp32=march.rv32iafc_zicsr_zifencei/mabi.ilp32 \ |
| 94 | +march.rv32i_zicsr_zifencei/mabi.ilp32=march.rv32ic_zicsr_zifencei/mabi.ilp32 \ |
| 95 | +march.rv32im_zicsr_zifencei/mabi.ilp32=march.rv32ima_zicsr_zifencei/mabi.ilp32 \ |
| 96 | +march.rv32im_zicsr_zifencei/mabi.ilp32=march.rv32imc_zicsr_zifencei/mabi.ilp32 \ |
| 97 | +march.rv32im_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.ilp32=march.rv32ima_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.ilp32 \ |
| 98 | +march.rv32im_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.ilp32=march.rv32imac_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.ilp32 \ |
| 99 | +march.rv32im_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.ilp32=march.rv32imc_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.ilp32 \ |
| 100 | +march.rv32imafd_zicsr_zifencei/mabi.ilp32d=march.rv32imafdc_zicsr_zifencei/mabi.ilp32d \ |
| 101 | +march.rv32imafd_zicsr_zifencei/mabi.ilp32d=march.rv32g/mabi.ilp32d \ |
| 102 | +march.rv32imafd_zicsr_zifencei/mabi.ilp32d=march.rv32gc/mabi.ilp32d \ |
| 103 | +march.rv32if_zicsr_zifencei/mabi.ilp32f=march.rv32iafc_zicsr_zifencei/mabi.ilp32f \ |
| 104 | +march.rv32e_zicsr_zifencei/mabi.ilp32e=march.rv32ea_zicsr_zifencei/mabi.ilp32e \ |
| 105 | +march.rv32e_zicsr_zifencei/mabi.ilp32e=march.rv32eac_zicsr_zifencei/mabi.ilp32e \ |
| 106 | +march.rv32e_zicsr_zifencei/mabi.ilp32e=march.rv32ec_zicsr_zifencei/mabi.ilp32e \ |
| 107 | +march.rv32em_zicsr_zifencei/mabi.ilp32e=march.rv32ema_zicsr_zifencei/mabi.ilp32e \ |
| 108 | +march.rv32emc_zicsr_zifencei/mabi.ilp32e=march.rv32emac_zicsr_zifencei/mabi.ilp32e \ |
| 109 | +march.rv32emc_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.ilp32e=march.rv32emac_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.ilp32e \ |
| 110 | +march.rv64i_zicsr_zifencei/mabi.lp64/mcmodel.medany=march.rv64i_zicsr_zifencei/mabi.lp64 \ |
| 111 | +march.rv64im_zicsr_zifencei/mabi.lp64/mcmodel.medany=march.rv64im_zicsr_zifencei/mabi.lp64 \ |
| 112 | +march.rv64im_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.lp64/mcmodel.medany=march.rv64im_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.lp64 \ |
| 113 | +march.rv64imac_zicsr_zifencei/mabi.lp64/mcmodel.medany=march.rv64imac_zicsr_zifencei/mabi.lp64 \ |
| 114 | +march.rv64imac_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.lp64/mcmodel.medany=march.rv64imac_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.lp64 \ |
| 115 | +march.rv64imafdc_zicsr_zifencei/mabi.lp64d/mcmodel.medany=march.rv64imafdc_zicsr_zifencei/mabi.lp64d \ |
| 116 | +march.rv64imafd_zicsr_zifencei/mabi.lp64d/mcmodel.medany=march.rv64imafd_zicsr_zifencei/mabi.lp64d \ |
| 117 | +march.rv64imfc_zicsr_zifencei/mabi.lp64f/mcmodel.medany=march.rv64imfc_zicsr_zifencei/mabi.lp64f \ |
| 118 | +march.rv64i_zicsr_zifencei/mabi.lp64/mcmodel.medany=march.rv64ia_zicsr_zifencei/mabi.lp64/mcmodel.medany \ |
| 119 | +march.rv64i_zicsr_zifencei/mabi.lp64/mcmodel.medany=march.rv64ia_zicsr_zifencei/mabi.lp64 \ |
| 120 | +march.rv64i_zicsr_zifencei/mabi.lp64/mcmodel.medany=march.rv64iac_zicsr_zifencei/mabi.lp64/mcmodel.medany \ |
| 121 | +march.rv64i_zicsr_zifencei/mabi.lp64/mcmodel.medany=march.rv64iac_zicsr_zifencei/mabi.lp64 \ |
| 122 | +march.rv64i_zicsr_zifencei/mabi.lp64/mcmodel.medany=march.rv64ic_zicsr_zifencei/mabi.lp64/mcmodel.medany \ |
| 123 | +march.rv64i_zicsr_zifencei/mabi.lp64/mcmodel.medany=march.rv64ic_zicsr_zifencei/mabi.lp64 \ |
| 124 | +march.rv64im_zicsr_zifencei/mabi.lp64/mcmodel.medany=march.rv64ima_zicsr_zifencei/mabi.lp64/mcmodel.medany \ |
| 125 | +march.rv64im_zicsr_zifencei/mabi.lp64/mcmodel.medany=march.rv64ima_zicsr_zifencei/mabi.lp64 \ |
| 126 | +march.rv64im_zicsr_zifencei/mabi.lp64/mcmodel.medany=march.rv64imc_zicsr_zifencei/mabi.lp64/mcmodel.medany \ |
| 127 | +march.rv64im_zicsr_zifencei/mabi.lp64/mcmodel.medany=march.rv64imc_zicsr_zifencei/mabi.lp64 \ |
| 128 | +march.rv64im_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.lp64/mcmodel.medany=march.rv64ima_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.lp64/mcmodel.medany \ |
| 129 | +march.rv64im_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.lp64/mcmodel.medany=march.rv64ima_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.lp64 \ |
| 130 | +march.rv64im_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.lp64/mcmodel.medany=march.rv64imc_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.lp64/mcmodel.medany \ |
| 131 | +march.rv64im_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.lp64/mcmodel.medany=march.rv64imc_zicsr_zifencei_zba_zbb_zbc_zbs/mabi.lp64 \ |
| 132 | +march.rv64imafdc_zicsr_zifencei/mabi.lp64d/mcmodel.medany=march.rv64gc/mabi.lp64d/mcmodel.medany \ |
| 133 | +march.rv64imafdc_zicsr_zifencei/mabi.lp64d/mcmodel.medany=march.rv64gc/mabi.lp64d \ |
| 134 | +march.rv64imafd_zicsr_zifencei/mabi.lp64d/mcmodel.medany=march.rv64g/mabi.lp64d/mcmodel.medany \ |
| 135 | +march.rv64imafd_zicsr_zifencei/mabi.lp64d/mcmodel.medany=march.rv64g/mabi.lp64d |
| 136 | + |
| 137 | +# Automatically generate multilib options and directory names from the target configurations |
| 138 | +space := $(subst ,, ) |
| 139 | + |
| 140 | +MULTILIB_OPTIONS = $(subst $(space),/,$(patsubst %,march=%,$(MULTILIB_SRC_ARCH))) |
| 141 | +MULTILIB_OPTIONS += $(subst $(space),/,$(patsubst %,mabi=%,$(MULTILIB_SRC_ABI))) |
| 142 | +MULTILIB_OPTIONS += $(subst $(space),/,$(patsubst %,mcmodel=%,$(MULTILIB_SRC_MCMODEL))) |
| 143 | + |
| 144 | +MULTILIB_DIRNAMES = $(MULTILIB_SRC_ARCH) $(MULTILIB_SRC_ABI) $(MULTILIB_SRC_MCMODEL) |
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