hal: Add ULP component

Add ULP component based on a2f420a36ecf8cd19b443adde1d75e5eaecc6309

Signed-off-by: Lucas Tamborrino <[email protected]>

Author: LucasTambor

components/ulp/CMakeLists.txt

@@ -0,0 +1,89 @@
+idf_build_get_property(target IDF_TARGET)
+
+if(${target} STREQUAL "linux")
+    return() # This component is not supported by the POSIX/Linux simulator
+endif()
+
+set(srcs "")
+set(includes "")
+
+if(CONFIG_ULP_COPROC_ENABLED OR CONFIG_IDF_DOC_BUILD)
+    list(APPEND includes
+        ulp_common/include)
+endif()
+
+if(CONFIG_ULP_COPROC_TYPE_FSM OR (CONFIG_IDF_DOC_BUILD AND CONFIG_SOC_ULP_FSM_SUPPORTED))
+    list(APPEND includes
+        ulp_fsm/include
+        ulp_fsm/include/${target})
+endif()
+
+if(CONFIG_ULP_COPROC_TYPE_RISCV OR CONFIG_IDF_DOC_BUILD)
+    list(APPEND includes
+        ulp_riscv/include
+        ulp_riscv/shared/include)
+endif()
+
+if(CONFIG_ULP_COPROC_TYPE_LP_CORE OR CONFIG_IDF_DOC_BUILD)
+    list(APPEND includes
+         lp_core/include
+         lp_core/shared/include)
+endif()
+
+if(CONFIG_ULP_COPROC_TYPE_FSM OR CONFIG_ULP_COPROC_TYPE_RISCV)
+
+    list(APPEND srcs
+        "ulp_common/ulp_common.c"
+        "ulp_common/ulp_adc.c")
+
+    if(CONFIG_ULP_COPROC_TYPE_FSM)
+        list(APPEND srcs
+            "ulp_fsm/ulp.c"
+            "ulp_fsm/ulp_macro.c")
+
+    elseif(CONFIG_ULP_COPROC_TYPE_RISCV)
+        list(APPEND srcs
+            "ulp_riscv/ulp_riscv.c"
+            "ulp_riscv/ulp_riscv_lock.c"
+            "ulp_riscv/ulp_riscv_i2c.c")
+    endif()
+endif()
+
+if(CONFIG_ULP_COPROC_TYPE_LP_CORE)
+    list(APPEND srcs
+        "lp_core/lp_core.c"
+        "lp_core/shared/ulp_lp_core_memory_shared.c"
+        "lp_core/shared/ulp_lp_core_critical_section_shared.c")
+
+    if(CONFIG_SOC_ULP_LP_UART_SUPPORTED)
+        list(APPEND srcs "lp_core/lp_core_uart.c")
+    endif()
+
+    if(CONFIG_SOC_LP_I2C_SUPPORTED)
+        list(APPEND srcs "lp_core/lp_core_i2c.c")
+    endif()
+
+    if(CONFIG_SOC_LP_TIMER_SUPPORTED)
+        list(APPEND srcs "lp_core/shared/ulp_lp_core_lp_timer_shared.c")
+    endif()
+
+    if(CONFIG_SOC_LP_SPI_SUPPORTED)
+        list(APPEND srcs "lp_core/lp_core_spi.c")
+    endif()
+
+    if(CONFIG_SOC_LP_CORE_SUPPORT_ETM)
+        list(APPEND srcs "lp_core/lp_core_etm.c")
+    endif()
+
+    if(CONFIG_SOC_LP_ADC_SUPPORTED)
+        list(APPEND srcs "lp_core/shared/ulp_lp_core_lp_adc_shared.c")
+    endif()
+
+    if(CONFIG_SOC_LP_VAD_SUPPORTED)
+        list(APPEND srcs "lp_core/shared/ulp_lp_core_lp_vad_shared.c")
+    endif()
+endif()
+
+idf_component_register(SRCS ${srcs}
+                       INCLUDE_DIRS ${includes}
+                       REQUIRES driver esp_adc)

components/ulp/Kconfig

@@ -0,0 +1,140 @@
+menu "Ultra Low Power (ULP) Co-processor"
+    depends on (SOC_ULP_SUPPORTED || SOC_RISCV_COPROC_SUPPORTED || SOC_LP_CORE_SUPPORTED)
+
+    config ULP_COPROC_ENABLED
+        bool "Enable Ultra Low Power (ULP) Co-processor"
+        default "n"
+        help
+            Enable this feature if you plan to use the ULP Co-processor.
+            Once this option is enabled, further ULP co-processor configuration will appear in the menu.
+
+    choice ULP_COPROC_TYPE
+        prompt "ULP Co-processor type"
+        depends on ULP_COPROC_ENABLED
+        default ULP_COPROC_TYPE_RISCV if (IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3)
+        help
+            Choose the ULP Coprocessor type: ULP FSM (Finite State Machine) or ULP RISC-V.
+
+        config ULP_COPROC_TYPE_FSM
+            bool "ULP FSM (Finite State Machine)"
+            depends on SOC_ULP_FSM_SUPPORTED
+        config ULP_COPROC_TYPE_RISCV
+            bool "ULP RISC-V"
+            depends on SOC_RISCV_COPROC_SUPPORTED
+        config ULP_COPROC_TYPE_LP_CORE
+            bool "LP core RISC-V"
+            depends on SOC_LP_CORE_SUPPORTED
+    endchoice
+
+    config ULP_COPROC_RESERVE_MEM
+        int
+        prompt "RTC slow memory reserved for coprocessor"
+        depends on ULP_COPROC_ENABLED
+        default 512 if IDF_TARGET_ESP32
+        default 4096 if !IDF_TARGET_ESP32
+        range 32 8176 if IDF_TARGET_ESP32 || IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3
+        range 32 16352 if IDF_TARGET_ESP32C5 || IDF_TARGET_ESP32C6
+        range 32 31088 if IDF_TARGET_ESP32P4 # Some memory are reserved for ROM/RTC reserved
+        help
+            Bytes of memory to reserve for ULP Co-processor firmware & data.
+            Data is reserved at the beginning of RTC slow memory.
+
+
+    menu "ULP RISC-V Settings"
+        depends on ULP_COPROC_TYPE_RISCV
+
+        config ULP_RISCV_INTERRUPT_ENABLE
+            bool
+            prompt "Enable ULP RISC-V interrupts"
+            default "n"
+            help
+                Turn on this setting to enabled interrupts on the ULP RISC-V core.
+
+        config ULP_RISCV_UART_BAUDRATE
+            int
+            prompt "Baudrate used by the bitbanged ULP RISC-V UART driver"
+            default 9600
+            help
+                The accuracy of the bitbanged UART driver is limited, it is not
+                recommend to increase the value above 19200.
+
+        config ULP_RISCV_I2C_RW_TIMEOUT
+            int
+            prompt "Set timeout for ULP RISC-V I2C transaction timeout in ticks."
+            default 500
+            range -1 4294967295
+            help
+                Set the ULP RISC-V I2C read/write timeout. Set this value to -1
+                if the ULP RISC-V I2C read and write APIs should wait forever.
+                Please note that the tick rate of the ULP co-processor would be
+                different than the OS tick rate of the main core and therefore
+                can have different timeout value depending on which core the API
+                is invoked on.
+    endmenu
+
+    config ULP_SHARED_MEM
+        depends on ULP_COPROC_TYPE_LP_CORE
+        hex
+        default 0x10
+        help
+            Size of the shared memory defined in ulp_lp_core_memory_shared.c.
+            Size should be kept in-sync with the size of the struct defined there.
+
+    config ULP_ROM_PRINT_ENABLE
+        depends on ULP_COPROC_TYPE_LP_CORE && ESP_ROM_HAS_LP_ROM
+        bool
+        prompt "Enable print utilities from LP ROM"
+        default "y"
+        help
+            Set this option to enable printf functionality from LP ROM. This option
+            can help reduce the LP core binary size by not linking printf functionality
+            from RAM code.
+            Note: For LP ROM prints to work properly, make sure that the LP core boots
+            from the LP ROM.
+
+    menu "ULP Debugging Options"
+        config ULP_PANIC_OUTPUT_ENABLE
+            depends on ULP_COPROC_TYPE_LP_CORE && SOC_ULP_LP_UART_SUPPORTED
+            bool
+            prompt "Enable panic handler which outputs over LP UART"
+            default "y" if IDF_TARGET_ESP32P4
+            help
+                Set this option to enable panic handler functionality. If this option is
+                enabled then the LP Core will output a panic dump over LP UART,
+                similar to what the main core does. Output depends on LP UART already being
+                initialized and configured.
+                Disabling this option will reduce the LP core binary size by not
+                linking in panic handler functionality.
+
+        config ULP_HP_UART_CONSOLE_PRINT
+            depends on ULP_COPROC_TYPE_LP_CORE
+            bool
+            prompt "Route lp_core_printf to the console HP-UART"
+            help
+                Set this option to route lp_core_printf to the console HP-UART.
+                This allows you to easily view print outputs from the LP core, without
+                having to connect to the LP-UART. This option comes with the following
+                limitations:
+
+                1. There is no mutual exclusion between the HP-Core and the LP-Core accessing
+                the HP-UART, which means that if both cores are logging heavily the output
+                strings might get mangled together.
+                2. The HP-UART can only work while the HP-Core is running, which means that
+                if the HP-Core is in deep sleep, the LP-Core will not be able to print to the
+                console HP-UART.
+
+                Due to these limitations it is only recommended to use this option for easy debugging.
+                For more serious use-cases you should use the LP-UART.
+
+        config ULP_NORESET_UNDER_DEBUG
+            bool "Avoid resetting LP core when debugger is attached"
+            depends on ULP_COPROC_TYPE_LP_CORE
+            default "y"
+            help
+                Enable this feature to avoid resetting LP core in sleep mode when debugger is attached,
+                otherwise configured HW breakpoints and dcsr.ebreak* bits will be missed.
+                This is a workaround until it will be fixed in HW.
+
+    endmenu
+
+endmenu  # Ultra Low Power (ULP) Co-processor

components/ulp/cmake/CMakeLists.txt

@@ -0,0 +1,11 @@
+cmake_minimum_required(VERSION 3.16)
+
+include(${IDF_PATH}/tools/cmake/idf.cmake)
+project(${ULP_APP_NAME})
+add_executable(${ULP_APP_NAME})
+
+include(IDFULPProject)
+
+ulp_apply_default_options(${ULP_APP_NAME})
+ulp_apply_default_sources(${ULP_APP_NAME})
+ulp_add_build_binary_targets(${ULP_APP_NAME})