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hal: update RTC IO LL
Updates to support LP GPIO Signed-off-by: Lucas Tamborrino <[email protected]>
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components/hal/esp32c6/include/hal/rtc_io_ll.h

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@@ -41,6 +41,15 @@ typedef enum {
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RTCIO_WAKEUP_HIGH_LEVEL = 0x5, /*!< GPIO interrupt type : input high level trigger */
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} rtcio_ll_wake_type_t;
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typedef enum {
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RTCIO_INTR_DISABLE = 0, /*!< Disable GPIO interrupt */
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RTCIO_INTR_POSEDGE = 1, /*!< GPIO interrupt type : rising edge */
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RTCIO_INTR_NEGEDGE = 2, /*!< GPIO interrupt type : falling edge */
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RTCIO_INTR_ANYEDGE = 3, /*!< GPIO interrupt type : both rising and falling edge */
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RTCIO_INTR_LOW_LEVEL = 4, /*!< GPIO interrupt type : input low level trigger */
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RTCIO_INTR_HIGH_LEVEL = 5, /*!< GPIO interrupt type : input high level trigger */
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} rtcio_ll_intr_type_t;
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typedef enum {
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RTCIO_OUTPUT_NORMAL = 0, /*!< RTCIO output mode is normal. */
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RTCIO_OUTPUT_OD = 0x1, /*!< RTCIO output mode is open-drain. */
@@ -299,6 +308,24 @@ static inline void rtcio_ll_wakeup_disable(int rtcio_num)
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LP_IO.pin[rtcio_num].int_type = RTCIO_WAKEUP_DISABLE;
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}
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/**
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* Enable interrupt function and set interrupt type
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*
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* @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
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* @param type Interrupt type on high level or low level.
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*/
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static inline void rtcio_ll_intr_enable(int rtcio_num, rtcio_ll_intr_type_t type)
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{
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LP_IO.pin[rtcio_num].int_type = type;
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/* Work around for HW issue,
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need to also enable this clk, so that LP_IO.status.status_interrupt can get updated,
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and trigger the interrupt on the LP Core
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*/
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LP_IO.date.clk_en = 1;
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}
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/**
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* Enable rtc io output in deep sleep.
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*

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