intc: Shared allocator for Xtensa and RISCV

Raffael Rostagno · raffarost · commit a2572b2c024a · 2025-03-26T10:08:49.000-03:00
Shared allocator for Xtensa and RISCV

Signed-off-by: Raffael Rostagno &lt;raffael.rostagno@espressif.com&gt;
diff --git a/components/esp_hw_support/include/esp_private/esp_riscv_intr.h b/components/esp_hw_support/include/esp_private/esp_riscv_intr.h
@@ -28,12 +28,12 @@ static inline uint32_t esp_riscv_intr_num_flags(int intr_num, uint32_t rsvd_mask
     }
 
     extern intptr_t _mtvt_table[48];
-    extern intptr_t _interrupt_handler;
+    extern intptr_t _isr_wrapper;
 
     /* The first 16 entries of the array are internal interrupt, ignore them  */
     const intptr_t destination = _mtvt_table[16 + intr_num];
 
-    return (destination != (intptr_t)&_interrupt_handler) ? ESP_CPU_INTR_DESC_FLAG_RESVD : 0;
+    return (destination != (intptr_t)&_isr_wrapper) ? ESP_CPU_INTR_DESC_FLAG_RESVD : 0;
 }
 
 
@@ -60,13 +60,12 @@ static inline uint32_t esp_riscv_intr_num_flags(int intr_num, uint32_t rsvd_mask
     }
 
     extern intptr_t _vector_table[32];
-    extern int _interrupt_handler;
     const intptr_t pc = (intptr_t) &_vector_table[intr_num];
 
     /* JAL instructions are relative to the PC they are executed from. */
     const intptr_t destination = pc + riscv_decode_offset_from_jal_instruction(pc);
 
-    return (destination != (intptr_t)&_interrupt_handler) ? ESP_CPU_INTR_DESC_FLAG_RESVD : 0;
+    return (destination != (intptr_t)&_isr_wrapper) ? ESP_CPU_INTR_DESC_FLAG_RESVD : 0;
 }
 
 #endif // SOC_INT_CLIC_SUPPORTED
diff --git a/components/esp_hw_support/port/esp32c2/esp_cpu_intr.c b/components/esp_hw_support/port/esp32c2/esp_cpu_intr.c
@@ -10,11 +10,12 @@
 void esp_cpu_intr_get_desc(int core_id, int intr_num, esp_cpu_intr_desc_t *intr_desc_ret)
 {
     /* On the ESP32-C2, interrupt:
+     * - 0 is unavailable according to TRM
      * - 1 is for Wi-Fi
      * - 6 for "permanently disabled interrupt", named INT_MUX_DISABLED_INTNO in the interrupt allocator
      */
     // [TODO: IDF-2465]
-    const uint32_t rsvd_mask = BIT(1) | BIT(6);
+    const uint32_t rsvd_mask = BIT(0) | BIT(1) | BIT(6);
 
     intr_desc_ret->priority = 1;
     intr_desc_ret->type = ESP_CPU_INTR_TYPE_NA;
diff --git a/components/esp_hw_support/port/esp32c3/esp_cpu_intr.c b/components/esp_hw_support/port/esp32c3/esp_cpu_intr.c
@@ -10,11 +10,12 @@
 void esp_cpu_intr_get_desc(int core_id, int intr_num, esp_cpu_intr_desc_t *intr_desc_ret)
 {
     /* On the ESP32-C3, interrupt:
+     * - 0 is unavailable according to TRM
      * - 1 is for Wi-Fi
      * - 6 for "permanently disabled interrupt", named INT_MUX_DISABLED_INTNO in the interrupt allocator
      */
     // [TODO: IDF-2465]
-    const uint32_t rsvd_mask = BIT(1) | BIT(6);
+    const uint32_t rsvd_mask = BIT(0) | BIT(1) | BIT(6);
 
     intr_desc_ret->priority = 1;
     intr_desc_ret->type = ESP_CPU_INTR_TYPE_NA;
diff --git a/components/esp_hw_support/port/esp32c6/esp_cpu_intr.c b/components/esp_hw_support/port/esp32c6/esp_cpu_intr.c
@@ -10,13 +10,12 @@
 void esp_cpu_intr_get_desc(int core_id, int intr_num, esp_cpu_intr_desc_t *intr_desc_ret)
 {
     /* On the ESP32-C6, interrupt:
+     * - 0, 3, 4, and 7 are used by the CPU for core-local interrupts (CLINT)
      * - 1 is for Wi-Fi
      * - 6 for "permanently disabled interrupt"
-     *
-     * Interrupts 3, 4 and 7 are unavailable for PULP CPU as they are bound to Core-Local Interrupts (CLINT)
      */
     // [TODO: IDF-2465]
-    const uint32_t rsvd_mask = BIT(1) | BIT(3) | BIT(4) | BIT(6) | BIT(7);
+    const uint32_t rsvd_mask = BIT(0) | BIT(1) | BIT(3) | BIT(4) | BIT(6) | BIT(7);
 
     intr_desc_ret->priority = 1;
     intr_desc_ret->type = ESP_CPU_INTR_TYPE_NA;
diff --git a/components/esp_timer/private_include/esp_timer_impl.h b/components/esp_timer/private_include/esp_timer_impl.h
@@ -19,15 +19,7 @@
 #include <stdint.h>
 #include "esp_err.h"
 
-#if defined(CONFIG_SOC_SERIES_ESP32C2) || \
-	defined(CONFIG_SOC_SERIES_ESP32C3) || \
-	defined(CONFIG_SOC_SERIES_ESP32C6)
-#include <zephyr/drivers/interrupt_controller/intc_esp32c3.h>
-#define ISR_HANDLER isr_handler_t
-#else
 #include <zephyr/drivers/interrupt_controller/intc_esp32.h>
-#define ISR_HANDLER intr_handler_t
-#endif
 
 /**
  * @brief Minimal initialization of platform specific layer of esp_timer
@@ -45,7 +37,7 @@ esp_err_t esp_timer_impl_early_init(void);
  * Before calling this function, esp_timer_impl_early_init must be called.
  * @return ESP_OK, ESP_ERR_NO_MEM, or one of the errors from interrupt allocator
  */
-esp_err_t esp_timer_impl_init(ISR_HANDLER alarm_handler);
+esp_err_t esp_timer_impl_init(intr_handler_t alarm_handler);
 
 /**
  * @brief Deinitialize platform specific layer of esp_timer
diff --git a/components/esp_timer/src/esp_timer.c b/components/esp_timer/src/esp_timer.c
@@ -38,15 +38,7 @@
 
 #include "sdkconfig.h"
 
-#if defined(CONFIG_SOC_SERIES_ESP32C2) || \
-	defined(CONFIG_SOC_SERIES_ESP32C3) || \
-	defined(CONFIG_SOC_SERIES_ESP32C6)
-#include <zephyr/drivers/interrupt_controller/intc_esp32c3.h>
-#define ISR_HANDLER isr_handler_t
-#else
 #include <zephyr/drivers/interrupt_controller/intc_esp32.h>
-#define ISR_HANDLER intr_handler_t
-#endif
 
 #define LOG_MODULE_NAME esp_timer
 #include <zephyr/logging/log.h>
@@ -576,7 +568,7 @@ esp_err_t esp_timer_init(void)
     esp_err_t err = ESP_OK;
     err = init_timer_task();
     if (err == ESP_OK) {
-        err = esp_timer_impl_init((ISR_HANDLER)&timer_alarm_handler);
+        err = esp_timer_impl_init((intr_handler_t)&timer_alarm_handler);
         if (err != ESP_OK) {
             ESP_EARLY_LOGE(TAG, "ISR init failed");
             deinit_timer_task();
diff --git a/components/esp_timer/src/esp_timer_impl_lac.c b/components/esp_timer/src/esp_timer_impl_lac.c
@@ -23,11 +23,7 @@
 #include "soc/timer_group_reg.h"
 #include "soc/rtc.h"
 
-#ifdef CONFIG_SOC_SERIES_ESP32C3
-#include <zephyr/drivers/interrupt_controller/intc_esp32c3.h>
-#else
 #include <zephyr/drivers/interrupt_controller/intc_esp32.h>
-#endif
 
 /**
  * @file esp_timer_lac.c
diff --git a/components/esp_timer/src/esp_timer_impl_systimer.c b/components/esp_timer/src/esp_timer_impl_systimer.c
@@ -22,15 +22,7 @@
 #include "hal/systimer_types.h"
 #include "hal/systimer_hal.h"
 
-#if defined(CONFIG_SOC_SERIES_ESP32C2) || \
-	defined(CONFIG_SOC_SERIES_ESP32C3) || \
-	defined(CONFIG_SOC_SERIES_ESP32C6)
-#include <zephyr/drivers/interrupt_controller/intc_esp32c3.h>
-#define ISR_HANDLER isr_handler_t
-#else
 #include <zephyr/drivers/interrupt_controller/intc_esp32.h>
-#define ISR_HANDLER intr_handler_t
-#endif
 
 /**
  * @file esp_timer_systimer.c
@@ -50,7 +42,7 @@ static const char *TAG = "esp_timer_systimer";
 /* Function from the upper layer to be called when the interrupt happens.
  * Registered in esp_timer_impl_init.
  */
-static ISR_HANDLER s_alarm_handler = NULL;
+static intr_handler_t s_alarm_handler = NULL;
 
 /* Systimer HAL layer object */
 static systimer_hal_context_t systimer_hal;
@@ -145,7 +137,7 @@ esp_err_t esp_timer_impl_early_init(void)
     return ESP_OK;
 }
 
-esp_err_t esp_timer_impl_init(ISR_HANDLER alarm_handler)
+esp_err_t esp_timer_impl_init(intr_handler_t alarm_handler)
 {
     int isr_flags = 0  /* ZEP-795 (GH #74368): esp_timer ISR priority relaxed to avoid
                         * IRQ not being allocated when several peripherals are enabled
@@ -156,7 +148,7 @@ esp_err_t esp_timer_impl_init(ISR_HANDLER alarm_handler)
                     | ESP_INTR_FLAG_IRAM;
 
 	esp_err_t err = esp_intr_alloc(ETS_SYSTIMER_TARGET2_EDGE_INTR_SOURCE, isr_flags,
-								   (ISR_HANDLER)timer_alarm_isr, NULL, NULL);
+								   (intr_handler_t)timer_alarm_isr, NULL, NULL);
 	if (err != ESP_OK) {
         ESP_EARLY_LOGE(TAG, "esp_intr_alloc failed (0x%x)", err);
         return err;
diff --git a/zephyr/esp32/src/wifi/esp_wifi_adapter.c b/zephyr/esp32/src/wifi/esp_wifi_adapter.c
@@ -405,17 +405,19 @@ static void clear_intr_wrapper(uint32_t intr_source, uint32_t intr_num)
 
 static void set_isr_wrapper(int32_t n, void *f, void *arg)
 {
-	esp_intr_alloc(n, 0, f, arg, NULL);
+	irq_disable(n);
+	irq_connect_dynamic(n, 0, f, arg, 0);
+	irq_enable(n);
 }
 
 static void intr_on(unsigned int mask)
 {
-	irq_enable(0);
+	irq_enable(__builtin_ctz(mask));
 }
 
 static void intr_off(unsigned int mask)
 {
-	irq_disable(0);
+	irq_disable(__builtin_ctz(mask));
 }
 
 uint32_t esp_get_free_heap_size(void)
diff --git a/zephyr/esp32c2/CMakeLists.txt b/zephyr/esp32c2/CMakeLists.txt
@@ -260,10 +260,11 @@ if(CONFIG_SOC_SERIES_ESP32C2)
     ../../components/log/log_noos.c
     ../../components/log/log.c
 
+    ../../components/riscv/interrupt.c
+    ../../components/riscv/instruction_decode.c
 
     ../port/heap/heap_caps_zephyr.c
     ../port/host_flash/cache_utils.c
-    ../../components/riscv/interrupt.c
     ../port/bootloader/bootloader_flash.c
 
     ../common/flash_init.c
diff --git a/zephyr/esp32c2/src/wifi/esp_wifi_adapter.c b/zephyr/esp32c2/src/wifi/esp_wifi_adapter.c
@@ -41,7 +41,7 @@
 #include <zephyr/kernel.h>
 #include <zephyr/sys/printk.h>
 #include <zephyr/random/random.h>
-#include <zephyr/drivers/interrupt_controller/intc_esp32c3.h>
+#include <zephyr/drivers/interrupt_controller/intc_esp32.h>
 #include "zephyr_compat.h"
 
 #include <zephyr/logging/log.h>
@@ -443,21 +443,19 @@ static void clear_intr_wrapper(uint32_t intr_source, uint32_t intr_num)
 
 static void set_isr_wrapper(int32_t n, void *f, void *arg)
 {
-	ARG_UNUSED(n);
-
-	/* workaround to force allocating same handler for wifi interrupts */
-	esp_intr_alloc(0, 0, (isr_handler_t)f, arg, NULL);
-	esp_intr_alloc(2, 0, (isr_handler_t)f, arg,	NULL);
+	irq_disable(n);
+	irq_connect_dynamic(n, 0, f, arg, 0);
+	irq_enable(n);
 }
 
 static void enable_intr_wrapper(unsigned int mask)
 {
-	esp_intr_enable(mask);
+	esprv_intc_int_enable(mask);
 }
 
 static void disable_intr_wrapper(unsigned int mask)
 {
-	esp_intr_disable(mask);
+	esprv_intc_int_disable(mask);
 }
 
 uint32_t esp_get_free_heap_size(void)
diff --git a/zephyr/esp32c3/CMakeLists.txt b/zephyr/esp32c3/CMakeLists.txt
@@ -339,9 +339,11 @@ if(CONFIG_SOC_SERIES_ESP32C3)
 
     ../../components/esp_mm/port/${CONFIG_SOC_SERIES}/ext_mem_layout.c
 
+    ../../components/riscv/interrupt.c
+    ../../components/riscv/instruction_decode.c
+
     ../port/heap/heap_caps_zephyr.c
     ../port/host_flash/cache_utils.c
-    ../../components/riscv/interrupt.c
     ../port/bootloader/bootloader_flash.c
 
     ../common/flash_init.c
diff --git a/zephyr/esp32c3/src/bt/esp_bt_adapter.c b/zephyr/esp32c3/src/bt/esp_bt_adapter.c
@@ -34,7 +34,7 @@
 #include <zephyr/kernel.h>
 #include <zephyr/sys/printk.h>
 #include <zephyr/random/random.h>
-#include <zephyr/drivers/interrupt_controller/intc_esp32c3.h>
+#include <zephyr/drivers/interrupt_controller/intc_esp32.h>
 
 #include <zephyr/logging/log.h>
 LOG_MODULE_REGISTER(esp32_bt_adapter, CONFIG_LOG_DEFAULT_LEVEL);
@@ -113,17 +113,17 @@ typedef struct {
 	int flags;                /*!< ISR alloc flag */
 	void (*fn)(void *);       /*!< ISR function */
 	void *arg;                /*!< ISR function args*/
-	isr_handler_t *handle;    /*!< ISR handle */
+	struct intr_handle_data_t *handle;    /*!< ISR handle */
 	esp_err_t ret;
 } btdm_isr_alloc_t;
 
 /* OSI function */
 struct osi_funcs_t {
     uint32_t _magic;
     uint32_t _version;
-    int (* _interrupt_alloc)(int cpu_id, int source, isr_handler_t handler, void *arg, void **ret_handle);
+    int (* _interrupt_alloc)(int cpu_id, int source, intr_handler_t handler, void *arg, void **ret_handle);
     int (* _interrupt_free)(void *handle);
-    void (*_interrupt_handler_set_rsv)(int interrupt_no, isr_handler_t fn, void *arg);
+    void (*_interrupt_handler_set_rsv)(int interrupt_no, intr_handler_t fn, void *arg);
     void (*_global_intr_disable)(void);
     void (*_global_intr_restore)(void);
     void (*_task_yield)(void);
@@ -237,7 +237,7 @@ extern void ets_backup_dma_copy(uint32_t reg, uint32_t mem_addr, uint32_t num, b
 extern void btdm_cca_feature_enable(void);
 extern void btdm_aa_check_enhance_enable(void);
 
-static int interrupt_alloc_wrapper(int cpu_id, int source, isr_handler_t handler, void *arg, void **ret_handle);
+static int interrupt_alloc_wrapper(int cpu_id, int source, intr_handler_t handler, void *arg, void **ret_handle);
 static int interrupt_free_wrapper(void *handle);
 static void global_interrupt_disable(void);
 static void global_interrupt_restore(void);
@@ -437,39 +437,34 @@ static inline void esp_bt_power_domain_off(void)
 static void btdm_intr_alloc(void *arg)
 {
 	btdm_isr_alloc_t *p = arg;
-	p->ret = esp_intr_alloc(p->source,	p->flags, (isr_handler_t)p->fn, p->arg, NULL);
+	p->ret = esp_intr_alloc(p->source,	p->flags, p->fn, p->arg, &p->handle);
 }
 
-static int interrupt_alloc_wrapper(int cpu_id, int source, isr_handler_t handler, void *arg, void **ret_handle)
+static int interrupt_alloc_wrapper(int cpu_id, int source, intr_handler_t handler, void *arg, void **ret_handle)
 {
 	btdm_isr_alloc_t p;
 	p.source = source;
 	p.flags = ESP_INTR_FLAG_LEVEL3 | ESP_INTR_FLAG_IRAM;
-	p.fn = (void *)handler;
+	p.fn = handler;
 	p.arg = arg;
-	p.handle = (isr_handler_t *)ret_handle;
+	p.handle = (struct intr_handle_data_t *)ret_handle;
 	btdm_intr_alloc(&p);
 	return p.ret;
 }
 
 static int interrupt_free_wrapper(void *handle)
 {
-	/* TODO: implement esp_intr_free() for ESP32-C3 */
-	return ESP_OK;
+	return esp_intr_free((struct intr_handle_data_t *)handle);
 }
 
 static int interrupt_enable_wrapper(void *handle)
 {
-	ARG_UNUSED(handle);
-
-	return ESP_OK;
+	return esp_intr_enable((struct intr_handle_data_t *)handle);
 }
 
 static int interrupt_disable_wrapper(void *handle)
 {
-	ARG_UNUSED(handle);
-
-	return ESP_OK;
+	return esp_intr_disable((struct intr_handle_data_t *)handle);
 }
 
 static void IRAM_ATTR global_interrupt_disable(void)
@@ -721,11 +716,7 @@ static void task_delete_wrapper(void *task_handle)
 
 static void *malloc_internal_wrapper(size_t size)
 {
-	void *ptr = esp_bt_malloc_func(size);
-	if (ptr == NULL) {
-		ets_printf("malloc_internal failed\n");
-	}
-	return ptr;
+	return esp_bt_malloc_func(sizeof(uint8_t) * size);
 }
 
 static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
@@ -1249,9 +1240,8 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
 	periph_module_enable(PERIPH_BT_MODULE);
 	periph_module_reset(PERIPH_BT_MODULE);
 
-	err = btdm_controller_init(cfg);
-	if (err != ESP_OK) {
-		ets_printf("BT controller init failed=%X\r\n", err);
+	if (btdm_controller_init(cfg) != 0) {
+		err = ESP_ERR_NO_MEM;
 		goto error;
 	}
 
diff --git a/zephyr/esp32c3/src/wifi/esp_wifi_adapter.c b/zephyr/esp32c3/src/wifi/esp_wifi_adapter.c
diff --git a/zephyr/esp32c6/CMakeLists.txt b/zephyr/esp32c6/CMakeLists.txt
diff --git a/zephyr/esp32c6/src/wifi/esp_wifi_adapter.c b/zephyr/esp32c6/src/wifi/esp_wifi_adapter.c
diff --git a/zephyr/esp32s2/src/wifi/esp_wifi_adapter.c b/zephyr/esp32s2/src/wifi/esp_wifi_adapter.c
diff --git a/zephyr/esp32s3/src/wifi/esp_wifi_adapter.c b/zephyr/esp32s3/src/wifi/esp_wifi_adapter.c

Original file line number	Diff line number	Diff line change
`@@ -28,12 +28,12 @@ static inline uint32_t esp_riscv_intr_num_flags(int intr_num, uint32_t rsvd_mask`
`28`	`28`	`}`
`29`	`29`
`30`	`30`	`extern intptr_t _mtvt_table[48];`
`31`		`- extern intptr_t _interrupt_handler;`
	`31`	`+ extern intptr_t _isr_wrapper;`
`32`	`32`
`33`	`33`	`/* The first 16 entries of the array are internal interrupt, ignore them */`
`34`	`34`	`const intptr_t destination = _mtvt_table[16 + intr_num];`
`35`	`35`
`36`		`- return (destination != (intptr_t)&_interrupt_handler) ? ESP_CPU_INTR_DESC_FLAG_RESVD : 0;`
	`36`	`+ return (destination != (intptr_t)&_isr_wrapper) ? ESP_CPU_INTR_DESC_FLAG_RESVD : 0;`
`37`	`37`	`}`
`38`	`38`
`39`	`39`
`@@ -60,13 +60,12 @@ static inline uint32_t esp_riscv_intr_num_flags(int intr_num, uint32_t rsvd_mask`
`60`	`60`	`}`
`61`	`61`
`62`	`62`	`extern intptr_t _vector_table[32];`
`63`		`- extern int _interrupt_handler;`
`64`	`63`	`const intptr_t pc = (intptr_t) &_vector_table[intr_num];`
`65`	`64`
`66`	`65`	`/* JAL instructions are relative to the PC they are executed from. */`
`67`	`66`	`const intptr_t destination = pc + riscv_decode_offset_from_jal_instruction(pc);`
`68`	`67`
`69`		`- return (destination != (intptr_t)&_interrupt_handler) ? ESP_CPU_INTR_DESC_FLAG_RESVD : 0;`
	`68`	`+ return (destination != (intptr_t)&_isr_wrapper) ? ESP_CPU_INTR_DESC_FLAG_RESVD : 0;`
`70`	`69`	`}`
`71`	`70`
`72`	`71`	`#endif // SOC_INT_CLIC_SUPPORTED`
Original file line number	Diff line number	Diff line change
`@@ -405,17 +405,19 @@ static void clear_intr_wrapper(uint32_t intr_source, uint32_t intr_num)`
`405`	`405`
`406`	`406`	`static void set_isr_wrapper(int32_t n, void f, void arg)`
`407`	`407`	`{`
`408`		`- esp_intr_alloc(n, 0, f, arg, NULL);`
	`408`	`+ irq_disable(n);`
	`409`	`+ irq_connect_dynamic(n, 0, f, arg, 0);`
	`410`	`+ irq_enable(n);`
`409`	`411`	`}`
`410`	`412`
`411`	`413`	`static void intr_on(unsigned int mask)`
`412`	`414`	`{`
`413`		`- irq_enable(0);`
	`415`	`+ irq_enable(__builtin_ctz(mask));`
`414`	`416`	`}`
`415`	`417`
`416`	`418`	`static void intr_off(unsigned int mask)`
`417`	`419`	`{`
`418`		`- irq_disable(0);`
	`420`	`+ irq_disable(__builtin_ctz(mask));`
`419`	`421`	`}`
`420`	`422`
`421`	`423`	`uint32_t esp_get_free_heap_size(void)`