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dt-bindings: add PB15 pin to gd32f405xx pinctrl headers
Files autogenerated using gd32pinctrl script. Signed-off-by: HaiLong Yang <[email protected]>
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‎include/dt-bindings/pinctrl/gd32f405r(g-k)xx-pinctrl.h‎

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -133,6 +133,8 @@
133133
GD32_PINMUX_AF('B', 13, ANALOG)
134134
#define ANALOG_PB14 \
135135
GD32_PINMUX_AF('B', 14, ANALOG)
136+
#define ANALOG_PB15 \
137+
GD32_PINMUX_AF('B', 15, ANALOG)
136138
#define ANALOG_PC0 \
137139
GD32_PINMUX_AF('C', 0, ANALOG)
138140
#define ANALOG_PC1 \
@@ -339,6 +341,8 @@
339341
GD32_PINMUX_AF('B', 13, AF15)
340342
#define EVENTOUT_PB14 \
341343
GD32_PINMUX_AF('B', 14, AF15)
344+
#define EVENTOUT_PB15 \
345+
GD32_PINMUX_AF('B', 15, AF15)
342346
#define EVENTOUT_PC0 \
343347
GD32_PINMUX_AF('C', 0, AF15)
344348
#define EVENTOUT_PC1 \
@@ -457,6 +461,8 @@
457461
GD32_PINMUX_AF('C', 6, AF5)
458462

459463
/* I2S1_SD */
464+
#define I2S1_SD_PB15 \
465+
GD32_PINMUX_AF('B', 15, AF5)
460466
#define I2S1_SD_PC1 \
461467
GD32_PINMUX_AF('C', 1, AF7)
462468
#define I2S1_SD_PC3 \
@@ -532,6 +538,10 @@
532538
#define NJTRST_PB4 \
533539
GD32_PINMUX_AF('B', 4, AF0)
534540

541+
/* RTC_REFIN */
542+
#define RTC_REFIN_PB15 \
543+
GD32_PINMUX_AF('B', 15, AF0)
544+
535545
/* SDIO_CK */
536546
#define SDIO_CK_PB2 \
537547
GD32_PINMUX_AF('B', 2, AF12)
@@ -619,6 +629,8 @@
619629
GD32_PINMUX_AF('C', 2, AF5)
620630

621631
/* SPI1_MOSI */
632+
#define SPI1_MOSI_PB15 \
633+
GD32_PINMUX_AF('B', 15, AF5)
622634
#define SPI1_MOSI_PC1 \
623635
GD32_PINMUX_AF('C', 1, AF7)
624636
#define SPI1_MOSI_PC3 \
@@ -711,6 +723,8 @@
711723
/* TIMER0_CH2_ON */
712724
#define TIMER0_CH2_ON_PB1 \
713725
GD32_PINMUX_AF('B', 1, AF1)
726+
#define TIMER0_CH2_ON_PB15 \
727+
GD32_PINMUX_AF('B', 15, AF1)
714728

715729
/* TIMER0_CH3 */
716730
#define TIMER0_CH3_PA11 \
@@ -728,6 +742,10 @@
728742
#define TIMER11_CH0_PB14 \
729743
GD32_PINMUX_AF('B', 14, AF9)
730744

745+
/* TIMER11_CH1 */
746+
#define TIMER11_CH1_PB15 \
747+
GD32_PINMUX_AF('B', 15, AF9)
748+
731749
/* TIMER12_CH0 */
732750
#define TIMER12_CH0_PA6 \
733751
GD32_PINMUX_AF('A', 6, AF9)
@@ -873,6 +891,8 @@
873891
/* TIMER7_CH2_ON */
874892
#define TIMER7_CH2_ON_PB1 \
875893
GD32_PINMUX_AF('B', 1, AF3)
894+
#define TIMER7_CH2_ON_PB15 \
895+
GD32_PINMUX_AF('B', 15, AF3)
876896

877897
/* TIMER7_CH3 */
878898
#define TIMER7_CH3_PC9 \
@@ -1034,6 +1054,10 @@
10341054
#define USBHS_DM_PB14 \
10351055
GD32_PINMUX_AF('B', 14, AF12)
10361056

1057+
/* USBHS_DP */
1058+
#define USBHS_DP_PB15 \
1059+
GD32_PINMUX_AF('B', 15, AF12)
1060+
10371061
/* USBHS_ID */
10381062
#define USBHS_ID_PB12 \
10391063
GD32_PINMUX_AF('B', 12, AF12)

‎include/dt-bindings/pinctrl/gd32f405v(g-k)xx-pinctrl.h‎

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -133,6 +133,8 @@
133133
GD32_PINMUX_AF('B', 13, ANALOG)
134134
#define ANALOG_PB14 \
135135
GD32_PINMUX_AF('B', 14, ANALOG)
136+
#define ANALOG_PB15 \
137+
GD32_PINMUX_AF('B', 15, ANALOG)
136138
#define ANALOG_PC0 \
137139
GD32_PINMUX_AF('C', 0, ANALOG)
138140
#define ANALOG_PC1 \
@@ -421,6 +423,8 @@
421423
GD32_PINMUX_AF('B', 13, AF15)
422424
#define EVENTOUT_PB14 \
423425
GD32_PINMUX_AF('B', 14, AF15)
426+
#define EVENTOUT_PB15 \
427+
GD32_PINMUX_AF('B', 15, AF15)
424428
#define EVENTOUT_PC0 \
425429
GD32_PINMUX_AF('C', 0, AF15)
426430
#define EVENTOUT_PC1 \
@@ -603,6 +607,8 @@
603607
GD32_PINMUX_AF('C', 6, AF5)
604608

605609
/* I2S1_SD */
610+
#define I2S1_SD_PB15 \
611+
GD32_PINMUX_AF('B', 15, AF5)
606612
#define I2S1_SD_PC1 \
607613
GD32_PINMUX_AF('C', 1, AF7)
608614
#define I2S1_SD_PC3 \
@@ -684,6 +690,10 @@
684690
#define NJTRST_PB4 \
685691
GD32_PINMUX_AF('B', 4, AF0)
686692

693+
/* RTC_REFIN */
694+
#define RTC_REFIN_PB15 \
695+
GD32_PINMUX_AF('B', 15, AF0)
696+
687697
/* SDIO_CK */
688698
#define SDIO_CK_PB2 \
689699
GD32_PINMUX_AF('B', 2, AF12)
@@ -771,6 +781,8 @@
771781
GD32_PINMUX_AF('C', 2, AF5)
772782

773783
/* SPI1_MOSI */
784+
#define SPI1_MOSI_PB15 \
785+
GD32_PINMUX_AF('B', 15, AF5)
774786
#define SPI1_MOSI_PC1 \
775787
GD32_PINMUX_AF('C', 1, AF7)
776788
#define SPI1_MOSI_PC3 \
@@ -885,6 +897,8 @@
885897
/* TIMER0_CH2_ON */
886898
#define TIMER0_CH2_ON_PB1 \
887899
GD32_PINMUX_AF('B', 1, AF1)
900+
#define TIMER0_CH2_ON_PB15 \
901+
GD32_PINMUX_AF('B', 15, AF1)
888902
#define TIMER0_CH2_ON_PE12 \
889903
GD32_PINMUX_AF('E', 12, AF1)
890904

@@ -908,6 +922,10 @@
908922
#define TIMER11_CH0_PB14 \
909923
GD32_PINMUX_AF('B', 14, AF9)
910924

925+
/* TIMER11_CH1 */
926+
#define TIMER11_CH1_PB15 \
927+
GD32_PINMUX_AF('B', 15, AF9)
928+
911929
/* TIMER12_CH0 */
912930
#define TIMER12_CH0_PA6 \
913931
GD32_PINMUX_AF('A', 6, AF9)
@@ -1065,6 +1083,8 @@
10651083
/* TIMER7_CH2_ON */
10661084
#define TIMER7_CH2_ON_PB1 \
10671085
GD32_PINMUX_AF('B', 1, AF3)
1086+
#define TIMER7_CH2_ON_PB15 \
1087+
GD32_PINMUX_AF('B', 15, AF3)
10681088

10691089
/* TIMER7_CH3 */
10701090
#define TIMER7_CH3_PC9 \
@@ -1270,6 +1290,10 @@
12701290
#define USBHS_DM_PB14 \
12711291
GD32_PINMUX_AF('B', 14, AF12)
12721292

1293+
/* USBHS_DP */
1294+
#define USBHS_DP_PB15 \
1295+
GD32_PINMUX_AF('B', 15, AF12)
1296+
12731297
/* USBHS_ID */
12741298
#define USBHS_ID_PB12 \
12751299
GD32_PINMUX_AF('B', 12, AF12)

‎include/dt-bindings/pinctrl/gd32f405z(e-g-k)xx-pinctrl.h‎

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -165,6 +165,8 @@
165165
GD32_PINMUX_AF('B', 13, ANALOG)
166166
#define ANALOG_PB14 \
167167
GD32_PINMUX_AF('B', 14, ANALOG)
168+
#define ANALOG_PB15 \
169+
GD32_PINMUX_AF('B', 15, ANALOG)
168170
#define ANALOG_PC0 \
169171
GD32_PINMUX_AF('C', 0, ANALOG)
170172
#define ANALOG_PC1 \
@@ -539,6 +541,8 @@
539541
GD32_PINMUX_AF('B', 13, AF15)
540542
#define EVENTOUT_PB14 \
541543
GD32_PINMUX_AF('B', 14, AF15)
544+
#define EVENTOUT_PB15 \
545+
GD32_PINMUX_AF('B', 15, AF15)
542546
#define EVENTOUT_PC0 \
543547
GD32_PINMUX_AF('C', 0, AF15)
544548
#define EVENTOUT_PC1 \
@@ -793,6 +797,8 @@
793797
GD32_PINMUX_AF('C', 6, AF5)
794798

795799
/* I2S1_SD */
800+
#define I2S1_SD_PB15 \
801+
GD32_PINMUX_AF('B', 15, AF5)
796802
#define I2S1_SD_PC1 \
797803
GD32_PINMUX_AF('C', 1, AF7)
798804
#define I2S1_SD_PC3 \
@@ -874,6 +880,10 @@
874880
#define NJTRST_PB4 \
875881
GD32_PINMUX_AF('B', 4, AF0)
876882

883+
/* RTC_REFIN */
884+
#define RTC_REFIN_PB15 \
885+
GD32_PINMUX_AF('B', 15, AF0)
886+
877887
/* SDIO_CK */
878888
#define SDIO_CK_PB2 \
879889
GD32_PINMUX_AF('B', 2, AF12)
@@ -961,6 +971,8 @@
961971
GD32_PINMUX_AF('C', 2, AF5)
962972

963973
/* SPI1_MOSI */
974+
#define SPI1_MOSI_PB15 \
975+
GD32_PINMUX_AF('B', 15, AF5)
964976
#define SPI1_MOSI_PC1 \
965977
GD32_PINMUX_AF('C', 1, AF7)
966978
#define SPI1_MOSI_PC3 \
@@ -1075,6 +1087,8 @@
10751087
/* TIMER0_CH2_ON */
10761088
#define TIMER0_CH2_ON_PB1 \
10771089
GD32_PINMUX_AF('B', 1, AF1)
1090+
#define TIMER0_CH2_ON_PB15 \
1091+
GD32_PINMUX_AF('B', 15, AF1)
10781092
#define TIMER0_CH2_ON_PE12 \
10791093
GD32_PINMUX_AF('E', 12, AF1)
10801094

@@ -1100,6 +1114,10 @@
11001114
#define TIMER11_CH0_PB14 \
11011115
GD32_PINMUX_AF('B', 14, AF9)
11021116

1117+
/* TIMER11_CH1 */
1118+
#define TIMER11_CH1_PB15 \
1119+
GD32_PINMUX_AF('B', 15, AF9)
1120+
11031121
/* TIMER12_CH0 */
11041122
#define TIMER12_CH0_PA6 \
11051123
GD32_PINMUX_AF('A', 6, AF9)
@@ -1261,6 +1279,8 @@
12611279
/* TIMER7_CH2_ON */
12621280
#define TIMER7_CH2_ON_PB1 \
12631281
GD32_PINMUX_AF('B', 1, AF3)
1282+
#define TIMER7_CH2_ON_PB15 \
1283+
GD32_PINMUX_AF('B', 15, AF3)
12641284

12651285
/* TIMER7_CH3 */
12661286
#define TIMER7_CH3_PC9 \
@@ -1490,6 +1510,10 @@
14901510
#define USBHS_DM_PB14 \
14911511
GD32_PINMUX_AF('B', 14, AF12)
14921512

1513+
/* USBHS_DP */
1514+
#define USBHS_DP_PB15 \
1515+
GD32_PINMUX_AF('B', 15, AF12)
1516+
14931517
/* USBHS_ID */
14941518
#define USBHS_ID_PB12 \
14951519
GD32_PINMUX_AF('B', 12, AF12)

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