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cameledgmarull
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pinconfigs: add exception to doc
Add GD32F405Vx and GD32F350xB/8/5 pinconfigs exception to doc. Signed-off-by: HaiLong Yang <[email protected]>
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pinconfigs/README.md

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@@ -151,4 +151,30 @@ pins:
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TIMER1_CH0: 1
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# USART1_CTS if AF7 is selected
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USART1_CTS: 7
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```
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```
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## Exception
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### GD32F405
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For GD32F405Vx series, LQFP100 package have 82 I/O pins, but BGA100 package only have 81 I/O pins. PD8 is lost on BGA100 package.
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### GD32F350
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For GD32F350xB/8/6 devices, there have some invalid signal mapping for USART0, I2C0 and SPI0.
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This issue cause by peripheral number increased on GD32F350xB/8/6, related pins already mapping
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to another signals.
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Below table show the invalid signal, pins mapping.
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| SIGNAL | PINS |
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| ---------- | --------- |
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| USART0_CTS | PA0 |
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| USART0_RTS | PA1 |
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| USART0_TX | PA2, PA14 |
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| USART0_RX | PA3, PA15 |
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| USART0_CK | PA4 |
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| I2C0_SCL | PB10, PF6 |
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| I2C0_SDA | PB11, PF7 |
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| SPI0_NSS | PB12 |
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| SPI0_SCK | PB13 |
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| SPI0_MISO | PB14 |
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| SPI0_MOSI | PB15 |

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