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Merged
merged 4 commits into from
Nov 14, 2021
Merged

gd32: add gd32f4xx #6

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77ab94c
hal: Add GD32F4xx firmware library v2.1.3
cameled Oct 21, 2021
55be617
gd32f4xx: timer: Rename timer_init function
cameled Oct 21, 2021
4bb2ad5
gd32f4xx: can: Rename CAN macro name
cameled Oct 21, 2021
8ac8109
hal: add redefine check for BIT macro
cameled Oct 26, 2021
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2 changes: 2 additions & 0 deletions GD32E10X/CMSIS/GD/GD32E10X/Include/gd32e10x.h
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Expand Up @@ -193,7 +193,9 @@ typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrStatus;
#define REG32(addr) (*(volatile uint32_t *)(uint32_t)(addr))
#define REG16(addr) (*(volatile uint16_t *)(uint32_t)(addr))
#define REG8(addr) (*(volatile uint8_t *)(uint32_t)(addr))
#ifndef BIT
#define BIT(x) ((uint32_t)((uint32_t)0x01U<<(x)))
#endif
#define BITS(start, end) ((0xFFFFFFFFUL << (start)) & (0xFFFFFFFFUL >> (31U - (uint32_t)(end))))
#define GET_BITS(regval, start, end) (((regval) & BITS((start),(end))) >> (start))

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2 changes: 1 addition & 1 deletion GD32E10X/standard_peripheral/Include/gd32e10x_timer.h
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Expand Up @@ -590,7 +590,7 @@ void timer_deinit(uint32_t timer_periph);
/* initialize TIMER init parameter struct */
void timer_struct_para_init(timer_parameter_struct* initpara);
/* initialize TIMER counter */
void timer_initialize(uint32_t timer_periph, timer_parameter_struct* initpara);
void gd32_timer_init(uint32_t timer_periph, timer_parameter_struct* initpara);
/* enable a timer */
void timer_enable(uint32_t timer_periph);
/* disable a timer */
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2 changes: 1 addition & 1 deletion GD32E10X/standard_peripheral/Source/gd32e10x_timer.c
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Expand Up @@ -156,7 +156,7 @@ void timer_struct_para_init(timer_parameter_struct* initpara)
\param[out] none
\retval none
*/
void timer_initialize(uint32_t timer_periph, timer_parameter_struct* initpara)
void gd32_timer_init(uint32_t timer_periph, timer_parameter_struct* initpara)
{
/* configure the counter prescaler value */
TIMER_PSC(timer_periph) = (uint16_t)initpara->prescaler;
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9 changes: 9 additions & 0 deletions GD32F403/standard_peripheral/Include/gd32f403_can.h
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Expand Up @@ -592,6 +592,12 @@ typedef enum

#define CAN_STATE_PENDING ((uint32_t)0x00000000U) /*!< CAN pending */

/* CAN communication mode */
#define GD32_CAN_NORMAL_MODE ((uint8_t)0x00U) /*!< normal communication mode */
#define GD32_CAN_LOOPBACK_MODE ((uint8_t)0x01U) /*!< loopback communication mode */
#define GD32_CAN_SILENT_MODE ((uint8_t)0x02U) /*!< silent communication mode */
#define GD32_CAN_SILENT_LOOPBACK_MODE ((uint8_t)0x03U) /*!< loopback and silent communication mode */

/* CAN resynchronisation jump width */
#define CAN_BT_SJW_1TQ ((uint8_t)0x00U) /*!< 1 time quanta */
#define CAN_BT_SJW_2TQ ((uint8_t)0x01U) /*!< 2 time quanta */
Expand Down Expand Up @@ -666,6 +672,9 @@ typedef enum
#define CAN_FT_DATA ((uint32_t)0x00000000U) /*!< data frame */
#define CAN_FT_REMOTE ((uint32_t)0x00000002U) /*!< remote frame */

/* CAN timeout */
#define GD32_CAN_TIMEOUT ((uint32_t)0x0000FFFFU) /*!< timeout value */

/* interrupt enable bits */
#define CAN_INT_TME CAN_INTEN_TMEIE /*!< transmit mailbox empty interrupt enable */
#define CAN_INT_RFNE0 CAN_INTEN_RFNEIE0 /*!< receive FIFO0 not empty interrupt enable */
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2 changes: 1 addition & 1 deletion GD32F403/standard_peripheral/Include/gd32f403_timer.h
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Expand Up @@ -594,7 +594,7 @@ void timer_deinit(uint32_t timer_periph);
/* initialize TIMER init parameter struct */
void timer_struct_para_init(timer_parameter_struct* initpara);
/* initialize TIMER counter */
void timer_initialize(uint32_t timer_periph, timer_parameter_struct* initpara);
void gd32_timer_init(uint32_t timer_periph, timer_parameter_struct* initpara);
/* enable a TIMER */
void timer_enable(uint32_t timer_periph);
/* disable a TIMER */
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21 changes: 6 additions & 15 deletions GD32F403/standard_peripheral/Source/gd32f403_can.c
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Expand Up @@ -38,15 +38,6 @@ OF SUCH DAMAGE.

#include "gd32f403_can.h"

/* CAN communication mode */
#define CAN_NORMAL_MODE ((uint8_t)0x00U) /*!< normal communication mode */
#define CAN_LOOPBACK_MODE ((uint8_t)0x01U) /*!< loopback communication mode */
#define CAN_SILENT_MODE ((uint8_t)0x02U) /*!< silent communication mode */
#define CAN_SILENT_LOOPBACK_MODE ((uint8_t)0x03U) /*!< loopback and silent communication mode */

/* CAN timeout */
#define CAN_TIMEOUT ((uint32_t)0x0000FFFFU) /*!< timeout value */

#define CAN_ERROR_HANDLE(s) do{}while(1)

/*!
Expand Down Expand Up @@ -97,7 +88,7 @@ void can_struct_para_init(can_struct_type_enum type, void* p_struct)
((can_parameter_struct*)p_struct)->time_segment_2 = CAN_BT_BS2_1TQ;
((can_parameter_struct*)p_struct)->time_triggered = DISABLE;
((can_parameter_struct*)p_struct)->trans_fifo_order = DISABLE;
((can_parameter_struct*)p_struct)->working_mode = CAN_NORMAL_MODE;
((can_parameter_struct*)p_struct)->working_mode = GD32_CAN_NORMAL_MODE;

break;
/* used for can_filter_init() */
Expand Down Expand Up @@ -151,7 +142,7 @@ void can_struct_para_init(can_struct_type_enum type, void* p_struct)
\param[in] can_periph
\arg CANx(x=0,1)
\param[in] can_parameter_init: parameters for CAN initializtion
\arg working_mode: CAN_NORMAL_MODE, CAN_LOOPBACK_MODE, CAN_SILENT_MODE, CAN_SILENT_LOOPBACK_MODE
\arg working_mode: GD32_CAN_NORMAL_MODE, GD32_CAN_LOOPBACK_MODE, GD32_CAN_SILENT_MODE, GD32_CAN_SILENT_LOOPBACK_MODE
\arg resync_jump_width: CAN_BT_SJW_xTQ(x=1, 2, 3, 4)
\arg time_segment_1: CAN_BT_BS1_xTQ(1..16)
\arg time_segment_2: CAN_BT_BS2_xTQ(1..8)
Expand All @@ -167,7 +158,7 @@ void can_struct_para_init(can_struct_type_enum type, void* p_struct)
*/
ErrStatus can_init(uint32_t can_periph, can_parameter_struct* can_parameter_init)
{
uint32_t timeout = CAN_TIMEOUT;
uint32_t timeout = GD32_CAN_TIMEOUT;
ErrStatus flag = ERROR;

/* disable sleep mode */
Expand Down Expand Up @@ -227,7 +218,7 @@ ErrStatus can_init(uint32_t can_periph, can_parameter_struct* can_parameter_init
}
/* disable initialize mode */
CAN_CTL(can_periph) &= ~CAN_CTL_IWMOD;
timeout = CAN_TIMEOUT;
timeout = GD32_CAN_TIMEOUT;
/* wait the ACK */
while((CAN_STAT_IWS == (CAN_STAT(can_periph) & CAN_STAT_IWS)) && (0U != timeout)){
timeout--;
Expand Down Expand Up @@ -680,7 +671,7 @@ ErrStatus can_working_mode_set(uint32_t can_periph, uint8_t working_mode)
{
ErrStatus flag = ERROR;
/* timeout for IWS or also for SLPWS bits */
uint32_t timeout = CAN_TIMEOUT;
uint32_t timeout = GD32_CAN_TIMEOUT;

if(CAN_MODE_INITIALIZE == working_mode){
/* disable sleep mode */
Expand Down Expand Up @@ -738,7 +729,7 @@ ErrStatus can_working_mode_set(uint32_t can_periph, uint8_t working_mode)
ErrStatus can_wakeup(uint32_t can_periph)
{
ErrStatus flag = ERROR;
uint32_t timeout = CAN_TIMEOUT;
uint32_t timeout = GD32_CAN_TIMEOUT;

/* wakeup */
CAN_CTL(can_periph) &= ~CAN_CTL_SLPWMOD;
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2 changes: 1 addition & 1 deletion GD32F403/standard_peripheral/Source/gd32f403_timer.c
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Expand Up @@ -140,7 +140,7 @@ void timer_struct_para_init(timer_parameter_struct* initpara)
\param[out] none
\retval none
*/
void timer_initialize(uint32_t timer_periph, timer_parameter_struct* initpara)
void gd32_timer_init(uint32_t timer_periph, timer_parameter_struct* initpara)
{
/* configure the counter prescaler value */
TIMER_PSC(timer_periph) = (uint16_t)initpara->prescaler;
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