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lucien-nxpdleach02
lucien-nxp
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dleach02
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mcux: add RT700 files
add RT700 files from sdk github main branch Signed-off-by: Lucien Zhao <[email protected]>
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354 files changed

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‎mcux/CMakeLists.txt

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -47,8 +47,11 @@ zephyr_compile_definitions(${MCUX_CPU})
4747
# practice, drilling down like this avoids the need for repetitive
4848
# build scripts for every mcux device.
4949
zephyr_library_sources(mcux-sdk/devices/${MCUX_DEVICE_PATH}/drivers/fsl_clock.c)
50-
if (${MCUX_DEVICE} MATCHES "LPC|MIMXRT6|MIMXRT5|RW6|MCXN.4.")
51-
zephyr_library_sources(mcux-sdk/devices/${MCUX_DEVICE_PATH}/drivers/fsl_power.c)
50+
if (${MCUX_DEVICE} MATCHES "LPC|MIMXRT6|MIMXRT5|MIMXRT7|RW6|MCXN.4.")
51+
# fsl_power.c contains ARM specific symbols, which shouldn't be included for Xtensa cores
52+
if (NOT ${MCUX_DEVICE} MATCHES "_dsp|_hifi1|_hifi4")
53+
zephyr_library_sources(mcux-sdk/devices/${MCUX_DEVICE_PATH}/drivers/fsl_power.c)
54+
endif()
5255
zephyr_library_sources(mcux-sdk/devices/${MCUX_DEVICE_PATH}/drivers/fsl_reset.c)
5356
zephyr_library_sources_ifdef(CONFIG_HWINFO_RW61X mcux-sdk/devices/${MCUX_DEVICE}/drivers/fsl_ocotp.c)
5457
endif()

‎mcux/hal_nxp.cmake

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -127,6 +127,10 @@ elseif (CONFIG_SOC_MCXN947_CPU1)
127127
include(device_system_MCXN947_cm33_core1)
128128
elseif (CONFIG_SOC_MCXN236)
129129
include(device_system_MCXN236)
130+
elseif (CONFIG_SOC_MIMXRT798S_CM33_CPU0)
131+
include(device_system_MIMXRT798S_cm33_core0)
132+
elseif (CONFIG_SOC_MIMXRT798S_CM33_CPU1)
133+
include(device_system_MIMXRT798S_cm33_core1)
130134
else()
131135
include(device_system)
132136
endif()
@@ -140,6 +144,7 @@ include_driver_ifdef(CONFIG_COUNTER_MCUX_CTIMER ctimer driver_ctimer)
140144
include_driver_ifdef(CONFIG_COUNTER_MCUX_LPC_RTC lpc_rtc driver_lpc_rtc)
141145
include_driver_ifdef(CONFIG_DMA_MCUX_LPC lpc_dma driver_lpc_dma)
142146
include_driver_ifdef(CONFIG_GPIO_MCUX_LPC lpc_gpio driver_lpc_gpio)
147+
include_driver_ifdef(CONFIG_GPIO_MCUX gpio driver_gpio)
143148
include_driver_ifdef(CONFIG_NXP_PINT pint driver_pint)
144149
include_driver_ifdef(CONFIG_NXP_PINT inputmux driver_inputmux)
145150
include_driver_ifdef(CONFIG_I2C_MCUX_FLEXCOMM flexcomm driver_flexcomm)
@@ -267,6 +272,7 @@ include_driver_ifdef(CONFIG_TRDC_MCUX_TRDC trdc driver_t
267272
include_driver_ifdef(CONFIG_S3MU_MCUX_S3MU s3mu driver_s3mu)
268273
include_driver_ifdef(CONFIG_PINCTRL_NXP_PORT port driver_port)
269274
include_driver_ifdef(CONFIG_DAI_NXP_MICFIL pdm driver_pdm)
275+
include_driver_ifdef(CONFIG_GLIKEY_MCUX_GLIKEY glikey driver_glikey)
270276
if(CONFIG_BT_NXP)
271277
include_driver_ifdef(CONFIG_SOC_SERIES_MCXW spc driver_spc)
272278
endif()
@@ -278,7 +284,7 @@ endif()
278284

279285
if ((${MCUX_DEVICE} MATCHES "MIMXRT1[0-9][0-9][0-9]") AND (NOT (CONFIG_SOC_MIMXRT1166_CM4 OR CONFIG_SOC_MIMXRT1176_CM4 OR CONFIG_SOC_MIMXRT1189_CM33)))
280286
include_driver_ifdef(CONFIG_HAS_MCUX_CACHE cache/armv7-m7 driver_cache_armv7_m7)
281-
elseif((${MCUX_DEVICE} MATCHES "MIMXRT(5|6)") OR (${MCUX_DEVICE} MATCHES "RW61") OR (${MCUX_DEVICE} MATCHES "MCXN.4."))
287+
elseif((${MCUX_DEVICE} MATCHES "MIMXRT(5|6|7)") OR (${MCUX_DEVICE} MATCHES "RW61") OR (${MCUX_DEVICE} MATCHES "MCXN.4."))
282288
include_driver_ifdef(CONFIG_HAS_MCUX_CACHE cache/cache64 driver_cache_cache64)
283289
elseif((${MCUX_DEVICE} MATCHES "MK(28|66)") OR (${MCUX_DEVICE} MATCHES "MKE(14|16|18)") OR (CONFIG_SOC_MIMXRT1166_CM4) OR (CONFIG_SOC_MIMXRT1176_CM4))
284290
include_driver_ifdef(CONFIG_HAS_MCUX_CACHE cache/lmem driver_cache_lmem)

‎mcux/mcux-sdk/boards/mimxrt700evk/flash_config/Kconfig

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,10 @@
1+
# Copyright 2024 NXP
2+
#
3+
# SPDX-License-Identifier: BSD-3-Clause
4+
5+
# driver_flash_config_mimxrt700evk
6+
config MCUX_USE_driver_flash_config_mimxrt700evk
7+
bool "Flash config"
8+
select MCUX_USE_driver_iap
9+
help
10+
flash config block

‎mcux/mcux-sdk/boards/mimxrt700evk/flash_config/driver_flash_config.cmake

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,14 @@
1+
#Description: Flash config; user_visible: True
2+
include_guard(GLOBAL)
3+
message("driver_flash_config component is included.")
4+
5+
target_sources(${MCUX_SDK_PROJECT_NAME} PRIVATE
6+
${CMAKE_CURRENT_LIST_DIR}/flash_config.c
7+
)
8+
9+
target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
10+
${CMAKE_CURRENT_LIST_DIR}/.
11+
)
12+
13+
14+
include(driver_iap)

‎mcux/mcux-sdk/boards/mimxrt700evk/flash_config/driver_flash_config_mimxrt700evk.cmake

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,14 @@
1+
#Description: Flash config; user_visible: True
2+
include_guard(GLOBAL)
3+
message("driver_flash_config_mimxrt700evk component is included.")
4+
5+
target_sources(${MCUX_SDK_PROJECT_NAME} PRIVATE
6+
${CMAKE_CURRENT_LIST_DIR}/flash_config.c
7+
)
8+
9+
target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
10+
${CMAKE_CURRENT_LIST_DIR}/.
11+
)
12+
13+
14+
include(driver_iap)

‎mcux/mcux-sdk/boards/mimxrt700evk/flash_config/flash_config.c

Lines changed: 125 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,125 @@
1+
/*
2+
* Copyright 2023 NXP
3+
* All rights reserved.
4+
*
5+
* SPDXLicense-Identifier: BSD-3-Clause
6+
*/
7+
#include "flash_config.h"
8+
9+
/* Component ID definition, used by tools. */
10+
#ifndef FSL_COMPONENT_ID
11+
#define FSL_COMPONENT_ID "platform.drivers.flash_config"
12+
#endif
13+
14+
/*******************************************************************************
15+
* Code
16+
******************************************************************************/
17+
#if defined(BOOT_HEADER_ENABLE) && (BOOT_HEADER_ENABLE == 1)
18+
#if defined(__ARMCC_VERSION) || defined(__GNUC__)
19+
__attribute__((section(".flash_conf"), used))
20+
#elif defined(__ICCARM__)
21+
#pragma location = ".flash_conf"
22+
#endif
23+
24+
const fc_static_platform_config_t flash_config = {
25+
.xspi_fcb_block = {
26+
.memConfig =
27+
{
28+
.tag = FC_XSPI_CFG_BLK_TAG,
29+
.version = FC_XSPI_CFG_BLK_VERSION,
30+
.readSampleClkSrc = kXSPIReadSampleClk_ExternalInputFromDqsPad,
31+
.csHoldTime = 3,
32+
.csSetupTime = 3,
33+
.deviceModeCfgEnable = 1,
34+
.deviceModeType = 2,
35+
.waitTimeCfgCommands = 1,
36+
.deviceModeSeq =
37+
{
38+
.seqNum = 1,
39+
.seqId = 6, /* See Lookup table for more details */
40+
.reserved = 0,
41+
},
42+
.deviceModeArg = 2, /* Enable OPI DDR mode */
43+
.controllerMiscOption =
44+
(1u << Fc_XspiMiscOffset_SafeConfigFreqEnable) | (1u << Fc_XspiMiscOffset_DdrModeEnable),
45+
.deviceType = 1,
46+
.sflashPadType = 8,
47+
.serialClkFreq = Fc_XspiSerialClk_200MHz,
48+
.sflashA1Size = 64ul * 1024u * 1024u,
49+
.busyOffset = 0u,
50+
.busyBitPolarity = 0u,
51+
.lookupTable =
52+
{
53+
/*Read*/
54+
[0] =
55+
FC_XSPI_LUT_SEQ(FC_CMD_DDR, FC_XSPI_8PAD, 0xEE, FC_CMD_DDR, FC_XSPI_8PAD, 0x11),
56+
[1] =
57+
FC_XSPI_LUT_SEQ(FC_CMD_RADDR_DDR, FC_XSPI_8PAD, 0x20, FC_CMD_DUMMY_SDR, FC_XSPI_8PAD, 0x12),
58+
[2] =
59+
FC_XSPI_LUT_SEQ(FC_CMD_DUMMY_SDR, FC_XSPI_8PAD, 0x2, FC_CMD_READ_DDR, FC_XSPI_8PAD, 0x4),
60+
[3] =
61+
FC_XSPI_LUT_SEQ(FC_CMD_STOP, FC_XSPI_8PAD, 0x0, 0, 0, 0),
62+
63+
/*Read status SPI*/
64+
[5 * 1 + 0] =
65+
FC_XSPI_LUT_SEQ(FC_CMD_SDR, FC_XSPI_1PAD, 0x05, FC_CMD_READ_SDR, FC_XSPI_1PAD, 0x04),
66+
67+
/* Read Status OPI */
68+
[5 * 2 + 0] =
69+
FC_XSPI_LUT_SEQ(FC_CMD_DDR, FC_XSPI_8PAD, 0x05, FC_CMD_DDR, FC_XSPI_8PAD, 0xFA),
70+
[5 * 2 + 1] =
71+
FC_XSPI_LUT_SEQ(FC_CMD_RADDR_DDR, FC_XSPI_8PAD, 0x20, FC_CMD_DUMMY_SDR, FC_XSPI_8PAD, 0x12),
72+
[5 * 2 + 2] =
73+
FC_XSPI_LUT_SEQ(FC_CMD_DUMMY_SDR, FC_XSPI_8PAD, 0x2, FC_CMD_READ_DDR, FC_XSPI_8PAD, 0x4),
74+
[5 * 2 + 3] =
75+
FC_XSPI_LUT_SEQ(FC_CMD_STOP, FC_XSPI_8PAD, 0x0, 0, 0, 0),
76+
77+
/*Write enable*/
78+
[5 * 3 + 0] =
79+
FC_XSPI_LUT_SEQ(FC_CMD_SDR, FC_XSPI_1PAD, 0x06, FC_CMD_STOP, FC_XSPI_1PAD, 0x04),
80+
81+
/* Write Enable - OPI */
82+
[5 * 4 + 0] =
83+
FC_XSPI_LUT_SEQ(FC_CMD_DDR, FC_XSPI_8PAD, 0x06, FC_CMD_DDR, FC_XSPI_8PAD, 0xF9),
84+
85+
/* Erase Sector */
86+
[5 * 5 + 0] =
87+
FC_XSPI_LUT_SEQ(FC_CMD_DDR, FC_XSPI_8PAD, 0x21, FC_CMD_DDR, FC_XSPI_8PAD, 0xDE),
88+
[5 * 5 + 1] =
89+
FC_XSPI_LUT_SEQ(FC_CMD_RADDR_DDR, FC_XSPI_8PAD, 0x20, FC_CMD_STOP, FC_XSPI_8PAD, 0x0),
90+
91+
/* Enable OPI DDR mode */
92+
[5 * 6 + 0] =
93+
FC_XSPI_LUT_SEQ(FC_CMD_SDR, FC_XSPI_1PAD, 0x72, FC_CMD_SDR, FC_XSPI_1PAD, 0x00),
94+
[5 * 6 + 1] =
95+
FC_XSPI_LUT_SEQ(FC_CMD_SDR, FC_XSPI_1PAD, 0x00, FC_CMD_SDR, FC_XSPI_1PAD, 0x00),
96+
[5 * 6 + 2] =
97+
FC_XSPI_LUT_SEQ(FC_CMD_SDR, FC_XSPI_1PAD, 0x00, FC_CMD_WRITE_SDR, FC_XSPI_1PAD, 0x01),
98+
99+
/* Page program */
100+
[5 * 9 + 0] =
101+
FC_XSPI_LUT_SEQ(FC_CMD_DDR, FC_XSPI_8PAD, 0x12, FC_CMD_DDR, FC_XSPI_8PAD, 0xED),
102+
[5 * 9 + 1] =
103+
FC_XSPI_LUT_SEQ(FC_CMD_RADDR_DDR, FC_XSPI_8PAD, 0x20, FC_CMD_WRITE_DDR, FC_XSPI_8PAD, 0x4),
104+
105+
/* Erase Chip */
106+
[5 * 11 + 0] =
107+
FC_XSPI_LUT_SEQ(FC_CMD_DDR, FC_XSPI_8PAD, 0x60, FC_CMD_DDR, FC_XSPI_8PAD, 0x9F),
108+
},
109+
},
110+
.pageSize = 256u,
111+
.sectorSize = 4u * 1024u,
112+
.ipcmdSerialClkFreq = 1u,
113+
.serialNorType = 2u,
114+
.blockSize = 64u * 1024u,
115+
.flashStateCtx = 0x07008200u,
116+
},
117+
#ifdef BOOT_ENABLE_XSPI1_PSRAM
118+
.psram_config_block = {
119+
.xmcdHeader = 0xC0010008,
120+
.xmcdOpt0 = 0xC0000700,
121+
},
122+
#endif
123+
};
124+
125+
#endif /* BOOT_HEADER_ENABLE */

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