mcux: components: Support RU TX power table

Support RU TX power table.

Signed-off-by: Maochen Wang <[email protected]>

Author: MaochenWang1

mcux/mcux-sdk/components/wifi_bt_module/AzureWave/tx_pwr_limits/wlan_txpwrlimit_cfg_WW_rw610.h

@@ -3271,6 +3271,51 @@ const static uint8_t rutxpowerlimit_csp_cfg_set[] = {
     0x00, 0x00, 0x00, 0x0d, 0x0f, 0x11, 0x11, 0x00, 0x00, 0x00, 0x0d, 0x0f, 0x11, 0x11, 0x00, 0x00, 0x00,
     0x09, 0x09, 0x09, 0x09, 0x00, 0x00, 0x00, 0x12, 0x12, 0x11, 0x11, 0x00, 0x00, 0x00, 0x0f, 0x12, 0x11,
     0x11, 0x00, 0x00, 0x00, 0x0b, 0x0e, 0x11, 0x11, 0x00, 0x00, 0x00, 0x14, 0x14, 0x11, 0x10, 0x00};
+
+const static uint8_t rutxpowerlimit_cfg_set_WW[] = {
+	0x6d, 0x02, 0x6c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x18, 0x01, 0x04, 0x06, 0x0a, 0x0e,
+	0x00, 0x00, 0x00, 0x04, 0x06, 0x0a, 0x0e, 0x00, 0x00, 0x00, 0x04, 0x06, 0x0a, 0x0e, 0x00, 0x00,
+	0x00, 0x06, 0x08, 0x0b, 0x0f, 0x00, 0x00, 0x00, 0x02, 0x05, 0x08, 0x0c, 0x00, 0x00, 0x00, 0x02,
+	0x05, 0x08, 0x0c, 0x00, 0x00, 0x00, 0x06, 0x0b, 0x0e, 0x11, 0x00, 0x00, 0x00, 0x06, 0x0b, 0x0e,
+	0x11, 0x00, 0x00, 0x00, 0x06, 0x09, 0x09, 0x09, 0x00, 0x00, 0x00, 0x09, 0x0c, 0x0f, 0x11, 0x00,
+	0x00, 0x00, 0x09, 0x0c, 0x0f, 0x11, 0x00, 0x00, 0x00, 0x08, 0x0b, 0x0e, 0x11, 0x00, 0x00, 0x00,
+	0x0e, 0x0e, 0x0e, 0x0e, 0x00, 0x64, 0x02, 0x03, 0x00, 0x88, 0x88, 0x00};
+
+const static uint8_t rutxpowerlimit_cfg_set_FCC[] = {
+	0x6d, 0x02, 0x6c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x18, 0x01, 0x11, 0x12, 0x12, 0x12,
+	0x00, 0x00, 0x00, 0x11, 0x12, 0x12, 0x11, 0x00, 0x00, 0x00, 0x0f, 0x12, 0x11, 0x10, 0x00, 0x00,
+	0x00, 0x0d, 0x0f, 0x11, 0x11, 0x00, 0x00, 0x00, 0x0d, 0x0f, 0x11, 0x11, 0x00, 0x00, 0x00, 0x0d,
+	0x0f, 0x11, 0x11, 0x00, 0x00, 0x00, 0x0d, 0x0f, 0x11, 0x11, 0x00, 0x00, 0x00, 0x0d, 0x0f, 0x11,
+	0x11, 0x00, 0x00, 0x00, 0x09, 0x09, 0x09, 0x09, 0x00, 0x00, 0x00, 0x11, 0x11, 0x11, 0x11, 0x00,
+	0x00, 0x00, 0x11, 0x11, 0x11, 0x11, 0x00, 0x00, 0x00, 0x08, 0x0b, 0x0e, 0x11, 0x00, 0x00, 0x00,
+	0x13, 0x13, 0x12, 0x10, 0x00, 0x64, 0x02, 0x03, 0x00, 0x88, 0x88, 0x00};
+
+const static uint8_t rutxpowerlimit_cfg_set_EU[] = {
+	0x6d, 0x02, 0x6c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x18, 0x01, 0x06, 0x0b, 0x0f, 0x12,
+	0x00, 0x00, 0x00, 0x0a, 0x0d, 0x10, 0x12, 0x00, 0x00, 0x00, 0x06, 0x09, 0x10, 0x11, 0x00, 0x00,
+	0x00, 0x0d, 0x0f, 0x11, 0x11, 0x00, 0x00, 0x00, 0x09, 0x0c, 0x0f, 0x11, 0x00, 0x00, 0x00, 0x09,
+	0x0c, 0x0f, 0x11, 0x00, 0x00, 0x00, 0x09, 0x0c, 0x0f, 0x11, 0x00, 0x00, 0x00, 0x09, 0x0c, 0x0f,
+	0x11, 0x00, 0x00, 0x00, 0x09, 0x0c, 0x0f, 0x11, 0x00, 0x00, 0x00, 0x09, 0x0c, 0x0f, 0x11, 0x00,
+	0x00, 0x00, 0x09, 0x0c, 0x0f, 0x11, 0x00, 0x00, 0x00, 0x09, 0x0c, 0x0f, 0x11, 0x00, 0x00, 0x00,
+	0x0e, 0x0e, 0x0e, 0x0e, 0x00, 0x64, 0x02, 0x03, 0x00, 0x88, 0x88, 0x00};
+
+const static uint8_t rutxpowerlimit_cfg_set_JP[] = {
+	0x6d, 0x02, 0x6c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x18, 0x01, 0x04, 0x06, 0x0a, 0x0e,
+	0x00, 0x00, 0x00, 0x04, 0x06, 0x0a, 0x0e, 0x00, 0x00, 0x00, 0x04, 0x06, 0x0a, 0x0e, 0x00, 0x00,
+	0x00, 0x06, 0x08, 0x0b, 0x0f, 0x00, 0x00, 0x00, 0x02, 0x05, 0x08, 0x0c, 0x00, 0x00, 0x00, 0x02,
+	0x05, 0x08, 0x0c, 0x00, 0x00, 0x00, 0x09, 0x0c, 0x0f, 0x11, 0x00, 0x00, 0x00, 0x09, 0x0c, 0x0f,
+	0x11, 0x00, 0x00, 0x00, 0x09, 0x0c, 0x0f, 0x11, 0x00, 0x00, 0x00, 0x09, 0x0c, 0x0f, 0x11, 0x00,
+	0x00, 0x00, 0x09, 0x0c, 0x0f, 0x11, 0x00, 0x00, 0x00, 0x09, 0x0c, 0x0f, 0x11, 0x00, 0x00, 0x00,
+	0x13, 0x13, 0x12, 0x10, 0x00, 0x64, 0x02, 0x03, 0x00, 0x88, 0x88, 0x00};
+
+const static uint8_t rutxpowerlimit_cfg_set_CN[] = {
+	0x6d, 0x02, 0x6c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x18, 0x01, 0x05, 0x09, 0x0c, 0x10,
+	0x00, 0x00, 0x00, 0x05, 0x09, 0x0c, 0x10, 0x00, 0x00, 0x00, 0x05, 0x09, 0x0c, 0x10, 0x00, 0x00,
+	0x00, 0x06, 0x0b, 0x0e, 0x11, 0x00, 0x00, 0x00, 0x06, 0x0b, 0x0e, 0x11, 0x00, 0x00, 0x00, 0x06,
+	0x0b, 0x0e, 0x11, 0x00, 0x00, 0x00, 0x06, 0x0b, 0x0e, 0x11, 0x00, 0x00, 0x00, 0x06, 0x0b, 0x0e,
+	0x11, 0x00, 0x00, 0x00, 0x06, 0x0b, 0x0e, 0x11, 0x00, 0x00, 0x00, 0x0e, 0x11, 0x11, 0x11, 0x00,
+	0x00, 0x00, 0x0e, 0x11, 0x11, 0x11, 0x00, 0x00, 0x00, 0x0e, 0x11, 0x11, 0x11, 0x00, 0x00, 0x00,
+	0x10, 0x10, 0x10, 0x0f, 0x00, 0x64, 0x02, 0x03, 0x00, 0x88, 0x88, 0x00};
 #else
 #define MAX_2G_RU_PWR_CHANNELS 26
 #define MAX_5G_RU_PWR_CHANNELS 69