@@ -2695,13 +2695,8 @@ static void FLEXCAN_ERRATA_6032(CAN_Type *base, volatile uint32_t *mbCSAddr)
26952695 uint32_t dbg_temp = 0U ;
26962696 uint32_t u32TempCS = 0U ;
26972697 uint32_t u32Timeout = DELAY_BUSIDLE ;
2698- uint32_t u32TempIMASK1 = base -> IMASK1 ;
2699- /*after backup all interruption, disable ALL interruption*/
2700- #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER )) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0 )
2701- uint32_t u32TempIMASK2 = base -> IMASK2 ;
2702- base -> IMASK2 = 0 ;
2703- #endif
2704- base -> IMASK1 = 0 ;
2698+ /*disable ALL interrupts to prevent any context switching*/
2699+ uint32_t irqMask = DisableGlobalIRQ ();
27052700 dbg_temp = (uint32_t )(base -> DBG1 );
27062701 switch (dbg_temp & CAN_DBG1_CFSM_MASK )
27072702 {
@@ -2743,10 +2738,7 @@ static void FLEXCAN_ERRATA_6032(CAN_Type *base, volatile uint32_t *mbCSAddr)
27432738 * mbCSAddr = u32TempCS ;
27442739 }
27452740 /*restore interruption*/
2746- base -> IMASK1 = u32TempIMASK1 ;
2747- #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER )) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0 )
2748- base -> IMASK2 = u32TempIMASK2 ;
2749- #endif
2741+ EnableGlobalIRQ (irqMask );
27502742}
27512743#endif
27522744
@@ -2776,12 +2768,12 @@ status_t FLEXCAN_WriteTxMb(CAN_Type *base, uint8_t mbIdx, const flexcan_frame_t
27762768 uint32_t cs_temp = 0 ;
27772769 status_t status ;
27782770
2779- #if (defined(FSL_FEATURE_FLEXCAN_HAS_ERRATA_6032 ) && FSL_FEATURE_FLEXCAN_HAS_ERRATA_6032 )
2780- FLEXCAN_ERRATA_6032 (base , & (base -> MB [mbIdx ].CS ));
2781- #endif
27822771 /* Check if Message Buffer is available. */
27832772 if (CAN_CS_CODE (kFLEXCAN_TxMbDataOrRemote ) != (base -> MB [mbIdx ].CS & CAN_CS_CODE_MASK ))
27842773 {
2774+ #if (defined(FSL_FEATURE_FLEXCAN_HAS_ERRATA_6032 ) && FSL_FEATURE_FLEXCAN_HAS_ERRATA_6032 )
2775+ FLEXCAN_ERRATA_6032 (base , & (base -> MB [mbIdx ].CS ));
2776+ #endif
27852777 /* Inactive Tx Message Buffer. */
27862778 base -> MB [mbIdx ].CS = (base -> MB [mbIdx ].CS & ~CAN_CS_CODE_MASK ) | CAN_CS_CODE (kFLEXCAN_TxMbInactive );
27872779
@@ -2862,14 +2854,13 @@ status_t FLEXCAN_WriteFDTxMb(CAN_Type *base, uint8_t mbIdx, const flexcan_fd_fra
28622854 volatile uint32_t * mbAddr = & (base -> MB [0 ].CS );
28632855 uint32_t offset = FLEXCAN_GetFDMailboxOffset (base , mbIdx );
28642856
2865- #if (defined(FSL_FEATURE_FLEXCAN_HAS_ERRATA_6032 ) && FSL_FEATURE_FLEXCAN_HAS_ERRATA_6032 )
2866- FLEXCAN_ERRATA_6032 (base , & (mbAddr [offset ]));
2867- #endif
2868-
28692857 can_cs = mbAddr [offset ];
28702858 /* Check if Message Buffer is available. */
28712859 if (CAN_CS_CODE (kFLEXCAN_TxMbDataOrRemote ) != (can_cs & CAN_CS_CODE_MASK ))
28722860 {
2861+ #if (defined(FSL_FEATURE_FLEXCAN_HAS_ERRATA_6032 ) && FSL_FEATURE_FLEXCAN_HAS_ERRATA_6032 )
2862+ FLEXCAN_ERRATA_6032 (base , & (mbAddr [offset ]));
2863+ #endif
28732864 /* Inactive Tx Message Buffer and Fill Message ID field. */
28742865 mbAddr [offset ] = (can_cs & ~CAN_CS_CODE_MASK ) | CAN_CS_CODE (kFLEXCAN_TxMbInactive );
28752866 mbAddr [offset + 1U ] = pTxFrame -> id ;
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