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mcux/middleware: update ieee_802_15_4/phy files
Updated files with SDK 25.06-pvw2 content. Signed-off-by: Cristian Bulacu <[email protected]>
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mcux/middleware/mcux-sdk-middleware-ieee_802.15.4/ieee_802_15_4/phy/interface/Phy.h

Lines changed: 18 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -262,6 +262,10 @@ typedef struct Phy_PhyLocalStruct_tag
262262
PD_MAC_SapHandler_t PD_MAC_SapHandler;
263263
PLME_MAC_SapHandler_t PLME_MAC_SapHandler;
264264

265+
#ifndef MEM_USE_ZEPHYR
266+
messaging_t macPhyInputQueue;
267+
#endif /* MEM_USE_ZEPHYR */
268+
265269
phyTxParams_t txParams;
266270
phyRxParams_t rxParams;
267271
phyCcaParams_t ccaParams;
@@ -346,6 +350,14 @@ typedef struct Phy_nbRssiCtrl_tag
346350
********************************************************************************** */
347351
void PhyHwInit(void);
348352

353+
#if defined(MFG_OT_RCP)
354+
/*! *********************************************************************************
355+
* \brief Update the XCVR HW
356+
*
357+
********************************************************************************** */
358+
void PhyHwUpdate(void);
359+
#endif
360+
349361
/*! *********************************************************************************
350362
* \brief Enable/Disable the XCVR promiscuous mode.
351363
* In promiscuous mode, all filtering except CRC are disabled
@@ -603,22 +615,22 @@ phyStatus_t PhyPlmeSetCurrentChannelRequest(uint8_t channel, uint8_t pan);
603615
uint8_t PhyPlmeGetCurrentChannelRequest(uint8_t pan);
604616

605617
/*! *********************************************************************************
606-
* \brief Set the TX power level
618+
* \brief Set the TX ouput power level in dBm signed value
607619
*
608-
* \param[in] pwrStep the Tx power level
620+
* \param[in] pwr_dbm Tx output power in dBm signed value
609621
*
610622
* \return status
611623
*
612624
********************************************************************************** */
613-
phyStatus_t PhyPlmeSetPwrLevelRequest(int8_t pwrStep);
625+
phyStatus_t PhyPlmeSetPwrLevelRequest(int8_t pwr_dbm);
614626

615627
/*! *********************************************************************************
616-
* \brief Get the TX power level
628+
* \brief Get the TX output power level in dBm signed value
617629
*
618-
* \return current power level
630+
* \return current TX output power in dBm signed value
619631
*
620632
********************************************************************************** */
621-
uint8_t PhyPlmeGetPwrLevelRequest(void);
633+
int8_t PhyPlmeGetPwrLevelRequest(void);
622634

623635
/*! *********************************************************************************
624636
* \brief Set a PHY PIB
@@ -957,12 +969,6 @@ uint8_t PhySetTxPowerLimit(uint8_t txPowerLimit);
957969
*/
958970
uint8_t PhyGetTxPowerLimit(void);
959971

960-
/*! *********************************************************************************
961-
* \brief This function will update tx power limit
962-
*
963-
* \return update txPowerLimit stored in gPhyChannelTxPowerLimits
964-
*/
965-
uint8_t PhyUpdateTxPowerLimit(void);
966972
#endif
967973

968974
/*! *********************************************************************************

mcux/middleware/mcux-sdk-middleware-ieee_802.15.4/ieee_802_15_4/phy/interface/PhyInterface.h

Lines changed: 31 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -31,6 +31,15 @@
3131
#include "PhyTypes.h"
3232
#include "PhyMessages.h"
3333

34+
/*! *********************************************************************************
35+
*************************************************************************************
36+
* Public type definitions
37+
*************************************************************************************
38+
********************************************************************************** */
39+
#define CONCAT_EXPAND(a,b) CONCAT(a, b) // expand then paste
40+
41+
_Static_assert(sizeof(phyMessageId_t) == sizeof(uint8_t), "phyMessageId_t bigger than 1 byte");
42+
3443
/************************************************************************************
3544
*************************************************************************************
3645
* Public macros
@@ -71,6 +80,10 @@
7180
/*! This define is used as a start time to signal that a current sequence is handled as soon as possible by the PHY layer. */
7281
#define gPhySeqStartAsap_c ((phyTime_t)(-1))
7382

83+
/*! \cond DOXY_SKIP_TAG */
84+
#define Phy_BufferAlloc(size) MSG_Alloc(size)
85+
/*! \endcond */
86+
7487
/*! These defines are used when using OpenThread Vendor Specific IE */
7588
#define IeData_LinkMarginThreshold_c (-102) /* -102 dBm receiver sensitivity from datasheet */
7689
#define IeData_Lqi_c 0x02 /* corelated with IE Data Elements in OT Link metrics */
@@ -113,7 +126,6 @@ typedef struct pdDataReq_tag
113126
{
114127
phyTime_t startTime; /*!< The absolute start time of the preamble over the air. A value of gPhySeqStartAsap_c to start immediately. */
115128
uint32_t txDuration; /*!< The computed duration for the Data Request frame. */
116-
phySlottedMode_t slottedTx;
117129
phyCCAType_t CCABeforeTx; /*!< Indicates, whether the CCA is used before this transmission. */
118130
phyAckRequired_t ackRequired; /*!< Indicates, whether the ACK is required for this transmission. */
119131
uint8_t psduLength; /*!< The number of octets contained in the PSDU to be transmitted by the PHY Layer, without the last two octets containing the FCS field. */
@@ -131,7 +143,9 @@ typedef struct pdDataCnf_tag
131143
phyStatus_t status;
132144
uint8_t ackLength;
133145
phyTime_t timeStamp;
134-
uint8_t *ackData; /* The ACK has to be right after the confirmation - allocate everything together */
146+
uint8_t ppduLinkQuality; /*!< Link quality (LQI) value measured during the reception of the ACK (if AR=1) */
147+
int8_t ppduRssi; /*!< RSSI (signal strength indicator)value measured during the reception of the ACK (if AR=1) */
148+
uint8_t *ackData; /* The ACK has to be right after the confirmation - allocate everything together */
135149
} pdDataCnf_t;
136150

137151
/*! The PD-DATA.indication primitive is generated by the PHY Layer when an MPDU is ready to be transferred to the MAC Layer.
@@ -207,12 +221,10 @@ typedef struct plmeEdCnf_tag
207221

208222
/*! The PLME-SET-TRX-STATE.request primitive is generated by the MAC Layer when the transceiver state must be changed by the PHY Layer, which then arms either an I or R sequence.
209223
This primitive is also used to cancel any ongoing sequence by setting the state to FORCE_TRX_OFF. If this primitive is issued with an RX_ON or TRX_OFF argument and the PHY is busy transmitting a PPDU, a state change will occur at the end of the transmission.
210-
If this primitive is issued with TRX_OFF, and the PHY is in the RX_ON state and has already received a valid SFD, the state change will occur at the end of reception of the PPDU.
211-
The slottedTx parameter is used by the PHY Layer during R sequence to determine whether the ensuing transmit acknowledge frame (if any) must be synchronized to a backoff slot boundary. */
224+
If this primitive is issued with TRX_OFF, and the PHY is in the RX_ON state and has already received a valid SFD, the state change will occur at the end of reception of the PPDU. */
212225
typedef struct plmeSetTRxStateReq_tag
213226
{
214227
phyState_t state; /*!< The new state in which to configure the transceiver */
215-
phySlottedMode_t slottedMode; /*!< Slotted/non-slotted mode */
216228
phyTime_t startTime; /*!< Absolute time */
217229
uint32_t rxDuration; /*!< If the requested state is Rx, then Rx will be enabled for rxDuration symbols. */
218230
} plmeSetTRxStateReq_t;
@@ -277,7 +289,7 @@ typedef PACKED_STRUCT filterAddr_tag
277289
/*! PHY Management Requests messages */
278290
typedef struct macToPlmeMessage_tag
279291
{
280-
phyMessageId_t msgType;
292+
uint8_t msgType;
281293
uint8_t ctx_id;
282294
union
283295
{
@@ -306,7 +318,7 @@ typedef struct macToPlmeMessage_tag
306318
/*! PHY Data Requests messages */
307319
typedef struct macToPdDataMessage_tag
308320
{
309-
phyMessageId_t msgType;
321+
uint8_t msgType;
310322
uint8_t ctx_id;
311323
union
312324
{
@@ -319,7 +331,7 @@ typedef struct macToPdDataMessage_tag
319331
/*! PHY Management Confirms/Indications messages */
320332
typedef struct plmeToMacMessage_tag
321333
{
322-
phyMessageId_t msgType;
334+
uint8_t msgType;
323335
uint8_t ctx_id;
324336
uint32_t fc; /* last frame counter used */
325337
union
@@ -332,7 +344,7 @@ typedef struct plmeToMacMessage_tag
332344
/*! PHY Data Confirms/Indications messages */
333345
typedef struct pdDataToMacMessage_tag
334346
{
335-
phyMessageId_t msgType;
347+
uint8_t msgType;
336348
uint8_t ctx_id;
337349
uint32_t fc; /* last frame counter used */
338350
union
@@ -345,8 +357,8 @@ typedef struct pdDataToMacMessage_tag
345357
/*! Common PHY message header */
346358
typedef struct phyMessageHeader_tag
347359
{
348-
phyMessageId_t msgType; /*!< The Id of the PHY message */
349-
uint8_t ctx_id; /*!< The instance of the upper layer */
360+
uint8_t msgType; /* phyMessageId_t */
361+
uint8_t ctx_id;
350362
} phyMessageHeader_t;
351363

352364
/*! PHY RX parameter */
@@ -626,6 +638,14 @@ bool PHY_XCVR_AllowLowPower(void);
626638
void PHY_allow_sleep();
627639
void PHY_disallow_sleep();
628640

641+
#ifdef PHY_LP_TMR
642+
phyTimeStatus_t phy_lp_time_init(void (*cb)());
643+
void phy_lp_time_deinit();
644+
phyTimeTimerId_t phy_lp_time_sched_ev(phyTimeEvent_t *ev);
645+
phyTimeStatus_t phy_lp_time_cancel_ev(phyTimeTimerId_t id);
646+
uint64_t phy_lp_time_get_timestamp();
647+
#endif
648+
629649
#ifdef __cplusplus
630650
}
631651
#endif

mcux/middleware/mcux-sdk-middleware-ieee_802.15.4/ieee_802_15_4/phy/interface/PhyMessages.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
********************************************************************************** */
55
/*! *********************************************************************************
66
* Copyright (c) 2015, Freescale Semiconductor, Inc.
7-
* Copyright 2016-2017, 2024 NXP
7+
* Copyright 2016-2017, 2024-2025 NXP
88
* All rights reserved.
99
*
1010
* \file
@@ -39,7 +39,6 @@ typedef enum
3939
gPlmeEdCnf_c, /*!< Channel Energy Detect Confirm */
4040

4141
gPlmeSetTRxStateReq_c, /*!< Set Transceiver State request */
42-
gPlmeSetTRxStateCnf_c, /*!< Set Transceiver State confirm */
4342

4443
gPlmeSetReq_c, /*!< Set PHY PIB request */
4544
gPlmeSetCnf_c, /*!< Unused */

mcux/middleware/mcux-sdk-middleware-ieee_802.15.4/ieee_802_15_4/phy/interface/PhyPlatform.h

Lines changed: 112 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*! *********************************************************************************
2-
* Copyright 2023-2024 NXP
2+
* Copyright 2023-2025 NXP
33
* All rights reserved.
44
*
55
* \file Platform specific definitions. This file contains the default values for
@@ -34,24 +34,18 @@
3434
#endif
3535

3636
// TODO Should be moved to platform file
37-
#if defined(KW45B41Z83_NBU_SERIES)
37+
#if defined(KW45B41Z83_NBU_SERIES) || \
38+
defined(MCXW727C_cm33_core1_SERIES) || \
39+
defined(KW43B43ZC7_NBU_SERIES)
3840
#define gPhyIrqNo_d (ZIGBEE_INT_IRQn)
39-
#elif defined(K32W1480_SERIES) || defined(MCXW716C_SERIES) || defined(MCXW716A_SERIES)
41+
#elif defined(K32W1480_SERIES) || \
42+
defined(MCXW716C_SERIES) || defined(MCXW716A_SERIES) || \
43+
defined(MCXW727C_cm33_core0_SERIES)
4044
#define gPhyIrqNo_d (RF_802_15_4_IRQn)
41-
#elif defined(MCXW72BD_cm33_core0_SERIES)
42-
#define gPhyIrqNo_d ((IRQn_Type)53)
43-
#elif defined(MCXW72BD_cm33_core1_SERIES)
44-
#define gPhyIrqNo_d ((IRQn_Type)ZIGBEE_INT_IRQn)
45+
#elif defined(KW43B43ZC7_SERIES)
46+
#define gPhyIrqNo_d (RF_ZIGBEE_IRQn)
4547
#endif
4648

47-
/*
48-
The channel number corresponds to the number of all the channels, between 11 to 26.
49-
It is used in the PhyUpdateTxPowerLimit() function which updates the power limit of
50-
all the channels in the case a Front-end module is mounted with a power amplifier on
51-
the narrow band path.
52-
*/
53-
#define CHANNEL_NUMBER (16)
54-
5549
/*
5650
* MIN_ENERGY_LEVEL, MAX_ENERGY_LEVEL are parameters used to scale
5751
* energy level between values 0x00-0xFF
@@ -153,16 +147,6 @@
153147
#define gPhyMaxTxPowerLevelInt8_d (63)
154148
#endif
155149

156-
#else /* FFU_CNS_TX_PWR_TABLE_CALIBRATION */
157-
#ifndef gPhyDefaultTxPowerLevel_d
158-
#define gPhyDefaultTxPowerLevel_d (22)
159-
#endif
160-
161-
#ifndef gPhyMaxTxPowerLevel_d
162-
#define gPhyMaxTxPowerLevel_d (32)
163-
#endif
164-
#endif /* FFU_CNS_TX_PWR_TABLE_CALIBRATION */
165-
166150
/* Tx Power level limit for each individual channel */
167151
#ifndef gChannelTxPowerLimit_c
168152
#define gChannelTxPowerLimit_c { gPhyMaxTxPowerLevel_d, /* 11 */ \
@@ -183,6 +167,100 @@
183167
gPhyMaxTxPowerLevel_d } /* 26 */
184168
#endif
185169

170+
#else /* FFU_CNS_TX_PWR_TABLE_CALIBRATION */
171+
172+
/*
173+
* Following defines are used when Tx Power is in dBm (signed value)
174+
*
175+
* the output TX Power is depending on PA_PWR settings, Analog settings and temperature
176+
*
177+
* there are defined 3 sets of defines all of them for 25 C:
178+
* - low rf output power = analog setting LDO_ANT_TRIM is at minimum voltage
179+
* - medium rf output power = analog setting LDO_ANT_TRIM is at medium voltage
180+
* - high rf output power = analog setting LDO_ANT_TRIM is at highiest voltage
181+
*/
182+
#ifndef gPhyMinTxPower_low_rf_dBm_Int8_d
183+
#define gPhyMinTxPower_low_rf_dBm_Int8_d (-32) // dBm
184+
#endif
185+
186+
#ifndef gPhyMaxTxPower_low_rf_dBm_Int8_d
187+
#define gPhyMaxTxPower_low_rf_dBm_Int8_d (+1) // dBm
188+
#endif
189+
190+
#ifndef gPhyMinTxPower_medium_rf_dBm_Int8_d
191+
#define gPhyMinTxPower_medium_rf_dBm_Int8_d (-24) // dBm
192+
#endif
193+
194+
#ifndef gPhyMaxTxPower_medium_rf_dBm_Int8_d
195+
#define gPhyMaxTxPower_medium_rf_dBm_Int8_d (+8) // dBm
196+
#endif
197+
198+
#ifndef gPhyMinTxPower_high_rf_dBm_Int8_d
199+
#define gPhyMinTxPower_high_rf_dBm_Int8_d (-22) // dBm
200+
#endif
201+
202+
#ifndef gPhyMaxTxPower_high_rf_dBm_Int8_d
203+
#define gPhyMaxTxPower_high_rf_dBm_Int8_d (+10) // dBm
204+
#endif
205+
206+
/*
207+
* Following defines are used when Tx Power is in number of PA slices (unsigned value)
208+
* PA slices are used for PA_PWR register settings according with datasheet
209+
*
210+
* Note: Odd & Even values
211+
* In Ref manual/datasheet are listed mostly even values: 0,1,2,4,6,8,...,62.
212+
* However despite all values odd and even are valid and should be legal,
213+
* will prefer and try to use only even values except 1.
214+
*/
215+
#ifndef gPhyMinTxPowerLevel_d
216+
#define gPhyMinTxPowerLevel_d (0x00) // PA slice 0, minimum no output power
217+
#endif
218+
219+
#ifndef gPhyMaxTxPowerLevel_d
220+
#define gPhyMaxTxPowerLevel_d (0x3F) // PA slice 63, maximum output power
221+
#endif
222+
223+
/*
224+
* Default values
225+
*/
226+
#ifndef gPhyDefaultTxPower_dBm_Int8_d
227+
#define gPhyDefaultTxPower_dBm_Int8_d (0) // set default tx power to 0 dBm (signed value)
228+
#endif
229+
230+
#ifndef gPhyDefaultTxPowerLevel_d
231+
#define gPhyDefaultTxPowerLevel_d (gPhyDefaultTxPower_dBm_Int8_d)
232+
#endif
233+
234+
#ifndef gPhyMaxTxPowerLimit_dBm_Int8_d
235+
#ifdef gAppMaxTxPowerDbm_c
236+
#define gPhyMaxTxPowerLimit_dBm_Int8_d (gAppMaxTxPowerDbm_c) // dBm (signed value)
237+
#else
238+
#define gPhyMaxTxPowerLimit_dBm_Int8_d (10) // dBm (signed value)
239+
#endif /* gAppMaxTxPowerDbm_c */
240+
#endif
241+
242+
/* Tx Power level limit for each individual channel */
243+
#ifndef gChannelTxPowerLimit_c
244+
#define gChannelTxPowerLimit_c { gPhyMaxTxPowerLimit_dBm_Int8_d, /* 11 */ \
245+
gPhyMaxTxPowerLimit_dBm_Int8_d, /* 12 */ \
246+
gPhyMaxTxPowerLimit_dBm_Int8_d, /* 13 */ \
247+
gPhyMaxTxPowerLimit_dBm_Int8_d, /* 14 */ \
248+
gPhyMaxTxPowerLimit_dBm_Int8_d, /* 15 */ \
249+
gPhyMaxTxPowerLimit_dBm_Int8_d, /* 16 */ \
250+
gPhyMaxTxPowerLimit_dBm_Int8_d, /* 17 */ \
251+
gPhyMaxTxPowerLimit_dBm_Int8_d, /* 18 */ \
252+
gPhyMaxTxPowerLimit_dBm_Int8_d, /* 19 */ \
253+
gPhyMaxTxPowerLimit_dBm_Int8_d, /* 20 */ \
254+
gPhyMaxTxPowerLimit_dBm_Int8_d, /* 21 */ \
255+
gPhyMaxTxPowerLimit_dBm_Int8_d, /* 22 */ \
256+
gPhyMaxTxPowerLimit_dBm_Int8_d, /* 23 */ \
257+
gPhyMaxTxPowerLimit_dBm_Int8_d, /* 24 */ \
258+
gPhyMaxTxPowerLimit_dBm_Int8_d, /* 25 */ \
259+
gPhyMaxTxPowerLimit_dBm_Int8_d } /* 26 */
260+
#endif
261+
262+
#endif /* FFU_CNS_TX_PWR_TABLE_CALIBRATION */
263+
186264
#ifndef mPhyOverhead_d
187265
#define mPhyOverhead_d (10) /* [sym] */
188266
#endif
@@ -214,19 +292,24 @@
214292
#define FE_POWER_AMPLIFIER_ENABLE 0
215293
#endif
216294

295+
/* External maximum internal power level Front End Module acceptable (dBm) */
296+
#ifndef FEM_INPUT_MAX_GAIN
297+
#define FEM_INPUT_MAX_GAIN 0
298+
#endif
299+
217300
/* External Front End module Power Amplifier gain (dB) */
218301
#ifndef FE_POWER_AMPLIFIER_GAIN
219302
#define FE_POWER_AMPLIFIER_GAIN 0
220303
#endif
221304

222305
/* External Front End module LNA (Low Noise Attenuator) enable */
223-
#ifndef FE_LNA_ENABLE
224-
#define FE_LNA_ENABLE 0
306+
#ifndef FEM_LNA_ENABLE
307+
#define FEM_LNA_ENABLE 0
225308
#endif
226309

227310
/* External Front End module LNA (Low Noise Attenuator) gain (dB) */
228-
#ifndef FE_LNA_GAIN
229-
#define FE_LNA_GAIN 0
311+
#ifndef FEM_LNA_GAIN
312+
#define FEM_LNA_GAIN 0
230313
#endif
231314

232315

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