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Dat-NguyenDuymmahadevan108
Dat-NguyenDuy
authored and
mmahadevan108
committed
s32ze: patch eMIOS MCL, PWM and ICU sources
Patch eMIOS MCL, PWM and ICU sources: - patch nocacheable region - move Emios_Ip_paxBase to read-only region as it should - remove "u" suffix in order to be used inside macro Signed-off-by: Dat Nguyen Duy <[email protected]>
1 parent 6fb2196 commit 620cbac

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6 files changed

+289
-289
lines changed

6 files changed

+289
-289
lines changed

‎s32/drivers/s32ze/BaseNXP/header/S32Z2_EMIOS.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -109,7 +109,7 @@ typedef struct {
109109
} eMIOS_Type, *eMIOS_MemMapPtr;
110110

111111
/** Number of instances of the eMIOS module. */
112-
#define eMIOS_INSTANCE_COUNT (2u)
112+
#define eMIOS_INSTANCE_COUNT (2)
113113

114114
/* eMIOS - Peripheral instance base addresses */
115115
/** Peripheral EMIOS_0 base address */

‎s32/drivers/s32ze/Mcl/include/Emios_Mcl_Ip.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -95,7 +95,7 @@ extern "C"{
9595
/*==================================================================================================
9696
* CONSTANTS
9797
==================================================================================================*/
98-
extern eMIOS_Type* Emios_Ip_paxBase[eMIOS_INSTANCE_COUNT];
98+
extern eMIOS_Type *const Emios_Ip_paxBase[eMIOS_INSTANCE_COUNT];
9999

100100
/*==================================================================================================
101101
* DEFINES AND MACROS

‎s32/drivers/s32ze/Mcl/src/Emios_Mcl_Ip.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -76,7 +76,7 @@ extern "C"{
7676
#define MCL_START_SEC_VAR_INIT_UNSPECIFIED_NO_CACHEABLE
7777
#include "Mcl_MemMap.h"
7878

79-
eMIOS_Type* Emios_Ip_paxBase[eMIOS_INSTANCE_COUNT] = IP_eMIOS_BASE_PTRS;
79+
eMIOS_Type *const Emios_Ip_paxBase[eMIOS_INSTANCE_COUNT] = IP_eMIOS_BASE_PTRS;
8080

8181
#define MCL_STOP_SEC_VAR_INIT_UNSPECIFIED_NO_CACHEABLE
8282
#include "Mcl_MemMap.h"
@@ -99,7 +99,7 @@ eMIOS_Type* Emios_Ip_paxBase[eMIOS_INSTANCE_COUNT] = IP_eMIOS_BASE_PTRS;
9999
#define MCL_START_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE
100100
#include "Mcl_MemMap.h"
101101

102-
static Emios_Ip_InstStateType Emios_Ip_axIpIsInitialized[eMIOS_INSTANCE_COUNT];
102+
VAR_SEC_NOCACHE(Emios_Ip_axIpIsInitialized) static Emios_Ip_InstStateType Emios_Ip_axIpIsInitialized[eMIOS_INSTANCE_COUNT];
103103

104104
#define MCL_STOP_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE
105105
#include "Mcl_MemMap.h"
@@ -110,7 +110,7 @@ eMIOS_Type* Emios_Ip_paxBase[eMIOS_INSTANCE_COUNT] = IP_eMIOS_BASE_PTRS;
110110
#define MCL_START_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE
111111
#include "Mcl_MemMap.h"
112112

113-
static Emios_Ip_ChStateType Emios_Ip_axChState[eMIOS_INSTANCE_COUNT][eMIOS_CH_UC_UC_COUNT];
113+
VAR_SEC_NOCACHE(Emios_Ip_axChState) static Emios_Ip_ChStateType Emios_Ip_axChState[eMIOS_INSTANCE_COUNT][eMIOS_CH_UC_UC_COUNT];
114114

115115
#define MCL_STOP_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE
116116
#include "Mcl_MemMap.h"

‎s32/drivers/s32ze/Rte/src/SchM_Icu.c

Lines changed: 86 additions & 86 deletions
Original file line numberDiff line numberDiff line change
@@ -99,92 +99,92 @@ extern "C"{
9999
==================================================================================================*/
100100
#define RTE_START_SEC_VAR_CLEARED_32_NO_CACHEABLE
101101
#include "Rte_MemMap.h"
102-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_00[NUMBER_OF_CORES];
103-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_00[NUMBER_OF_CORES];
104-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_01[NUMBER_OF_CORES];
105-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_01[NUMBER_OF_CORES];
106-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_02[NUMBER_OF_CORES];
107-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_02[NUMBER_OF_CORES];
108-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_03[NUMBER_OF_CORES];
109-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_03[NUMBER_OF_CORES];
110-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_04[NUMBER_OF_CORES];
111-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_04[NUMBER_OF_CORES];
112-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_05[NUMBER_OF_CORES];
113-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_05[NUMBER_OF_CORES];
114-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_06[NUMBER_OF_CORES];
115-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_06[NUMBER_OF_CORES];
116-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_07[NUMBER_OF_CORES];
117-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_07[NUMBER_OF_CORES];
118-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_08[NUMBER_OF_CORES];
119-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_08[NUMBER_OF_CORES];
120-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_09[NUMBER_OF_CORES];
121-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_09[NUMBER_OF_CORES];
122-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_11[NUMBER_OF_CORES];
123-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_11[NUMBER_OF_CORES];
124-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_15[NUMBER_OF_CORES];
125-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_15[NUMBER_OF_CORES];
126-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_16[NUMBER_OF_CORES];
127-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_16[NUMBER_OF_CORES];
128-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_17[NUMBER_OF_CORES];
129-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_17[NUMBER_OF_CORES];
130-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_18[NUMBER_OF_CORES];
131-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_18[NUMBER_OF_CORES];
132-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_19[NUMBER_OF_CORES];
133-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_19[NUMBER_OF_CORES];
134-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_20[NUMBER_OF_CORES];
135-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_20[NUMBER_OF_CORES];
136-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_21[NUMBER_OF_CORES];
137-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_21[NUMBER_OF_CORES];
138-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_22[NUMBER_OF_CORES];
139-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_22[NUMBER_OF_CORES];
140-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_23[NUMBER_OF_CORES];
141-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_23[NUMBER_OF_CORES];
142-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_24[NUMBER_OF_CORES];
143-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_24[NUMBER_OF_CORES];
144-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_25[NUMBER_OF_CORES];
145-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_25[NUMBER_OF_CORES];
146-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_26[NUMBER_OF_CORES];
147-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_26[NUMBER_OF_CORES];
148-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_27[NUMBER_OF_CORES];
149-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_27[NUMBER_OF_CORES];
150-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_28[NUMBER_OF_CORES];
151-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_28[NUMBER_OF_CORES];
152-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_29[NUMBER_OF_CORES];
153-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_29[NUMBER_OF_CORES];
154-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_30[NUMBER_OF_CORES];
155-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_30[NUMBER_OF_CORES];
156-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_31[NUMBER_OF_CORES];
157-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_31[NUMBER_OF_CORES];
158-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_32[NUMBER_OF_CORES];
159-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_32[NUMBER_OF_CORES];
160-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_33[NUMBER_OF_CORES];
161-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_33[NUMBER_OF_CORES];
162-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_44[NUMBER_OF_CORES];
163-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_44[NUMBER_OF_CORES];
164-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_45[NUMBER_OF_CORES];
165-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_45[NUMBER_OF_CORES];
166-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_46[NUMBER_OF_CORES];
167-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_46[NUMBER_OF_CORES];
168-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_47[NUMBER_OF_CORES];
169-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_47[NUMBER_OF_CORES];
170-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_48[NUMBER_OF_CORES];
171-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_48[NUMBER_OF_CORES];
172-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_49[NUMBER_OF_CORES];
173-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_49[NUMBER_OF_CORES];
174-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_50[NUMBER_OF_CORES];
175-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_50[NUMBER_OF_CORES];
176-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_51[NUMBER_OF_CORES];
177-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_51[NUMBER_OF_CORES];
178-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_52[NUMBER_OF_CORES];
179-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_52[NUMBER_OF_CORES];
180-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_53[NUMBER_OF_CORES];
181-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_53[NUMBER_OF_CORES];
182-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_57[NUMBER_OF_CORES];
183-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_57[NUMBER_OF_CORES];
184-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_58[NUMBER_OF_CORES];
185-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_58[NUMBER_OF_CORES];
186-
static volatile uint32 msr_ICU_EXCLUSIVE_AREA_59[NUMBER_OF_CORES];
187-
static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_59[NUMBER_OF_CORES];
102+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_00) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_00[NUMBER_OF_CORES];
103+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_00) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_00[NUMBER_OF_CORES];
104+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_01) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_01[NUMBER_OF_CORES];
105+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_01) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_01[NUMBER_OF_CORES];
106+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_02) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_02[NUMBER_OF_CORES];
107+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_02) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_02[NUMBER_OF_CORES];
108+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_03) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_03[NUMBER_OF_CORES];
109+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_03) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_03[NUMBER_OF_CORES];
110+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_04) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_04[NUMBER_OF_CORES];
111+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_04) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_04[NUMBER_OF_CORES];
112+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_05) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_05[NUMBER_OF_CORES];
113+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_05) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_05[NUMBER_OF_CORES];
114+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_06) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_06[NUMBER_OF_CORES];
115+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_06) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_06[NUMBER_OF_CORES];
116+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_07) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_07[NUMBER_OF_CORES];
117+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_07) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_07[NUMBER_OF_CORES];
118+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_08) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_08[NUMBER_OF_CORES];
119+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_08) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_08[NUMBER_OF_CORES];
120+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_09) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_09[NUMBER_OF_CORES];
121+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_09) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_09[NUMBER_OF_CORES];
122+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_11) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_11[NUMBER_OF_CORES];
123+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_11) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_11[NUMBER_OF_CORES];
124+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_15) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_15[NUMBER_OF_CORES];
125+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_15) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_15[NUMBER_OF_CORES];
126+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_16) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_16[NUMBER_OF_CORES];
127+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_16) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_16[NUMBER_OF_CORES];
128+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_17) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_17[NUMBER_OF_CORES];
129+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_17) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_17[NUMBER_OF_CORES];
130+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_18) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_18[NUMBER_OF_CORES];
131+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_18) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_18[NUMBER_OF_CORES];
132+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_19) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_19[NUMBER_OF_CORES];
133+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_19) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_19[NUMBER_OF_CORES];
134+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_20) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_20[NUMBER_OF_CORES];
135+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_20) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_20[NUMBER_OF_CORES];
136+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_21) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_21[NUMBER_OF_CORES];
137+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_21) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_21[NUMBER_OF_CORES];
138+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_22) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_22[NUMBER_OF_CORES];
139+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_22) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_22[NUMBER_OF_CORES];
140+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_23) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_23[NUMBER_OF_CORES];
141+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_23) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_23[NUMBER_OF_CORES];
142+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_24) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_24[NUMBER_OF_CORES];
143+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_24) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_24[NUMBER_OF_CORES];
144+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_25) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_25[NUMBER_OF_CORES];
145+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_25) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_25[NUMBER_OF_CORES];
146+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_26) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_26[NUMBER_OF_CORES];
147+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_26) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_26[NUMBER_OF_CORES];
148+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_27) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_27[NUMBER_OF_CORES];
149+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_27) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_27[NUMBER_OF_CORES];
150+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_28) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_28[NUMBER_OF_CORES];
151+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_28) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_28[NUMBER_OF_CORES];
152+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_29) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_29[NUMBER_OF_CORES];
153+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_29) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_29[NUMBER_OF_CORES];
154+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_30) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_30[NUMBER_OF_CORES];
155+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_30) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_30[NUMBER_OF_CORES];
156+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_31) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_31[NUMBER_OF_CORES];
157+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_31) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_31[NUMBER_OF_CORES];
158+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_32) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_32[NUMBER_OF_CORES];
159+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_32) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_32[NUMBER_OF_CORES];
160+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_33) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_33[NUMBER_OF_CORES];
161+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_33) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_33[NUMBER_OF_CORES];
162+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_44) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_44[NUMBER_OF_CORES];
163+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_44) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_44[NUMBER_OF_CORES];
164+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_45) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_45[NUMBER_OF_CORES];
165+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_45) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_45[NUMBER_OF_CORES];
166+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_46) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_46[NUMBER_OF_CORES];
167+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_46) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_46[NUMBER_OF_CORES];
168+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_47) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_47[NUMBER_OF_CORES];
169+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_47) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_47[NUMBER_OF_CORES];
170+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_48) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_48[NUMBER_OF_CORES];
171+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_48) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_48[NUMBER_OF_CORES];
172+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_49) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_49[NUMBER_OF_CORES];
173+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_49) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_49[NUMBER_OF_CORES];
174+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_50) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_50[NUMBER_OF_CORES];
175+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_50) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_50[NUMBER_OF_CORES];
176+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_51) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_51[NUMBER_OF_CORES];
177+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_51) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_51[NUMBER_OF_CORES];
178+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_52) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_52[NUMBER_OF_CORES];
179+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_52) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_52[NUMBER_OF_CORES];
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VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_53) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_53[NUMBER_OF_CORES];
181+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_53) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_53[NUMBER_OF_CORES];
182+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_57) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_57[NUMBER_OF_CORES];
183+
VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_57) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_57[NUMBER_OF_CORES];
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VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_58) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_58[NUMBER_OF_CORES];
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VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_58) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_58[NUMBER_OF_CORES];
186+
VAR_SEC_NOCACHE(msr_ICU_EXCLUSIVE_AREA_59) static volatile uint32 msr_ICU_EXCLUSIVE_AREA_59[NUMBER_OF_CORES];
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VAR_SEC_NOCACHE(reentry_guard_ICU_EXCLUSIVE_AREA_59) static volatile uint32 reentry_guard_ICU_EXCLUSIVE_AREA_59[NUMBER_OF_CORES];
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#define RTE_STOP_SEC_VAR_CLEARED_32_NO_CACHEABLE
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#include "Rte_MemMap.h"

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