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Hieu NguyenKhiemNguyenT
Hieu Nguyen
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KhiemNguyenT
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hal: renesas: rzt: Add support for RZ/T2L
Add HAL support for RZ/T2L Signed-off-by: Hieu Nguyen <[email protected]> Signed-off-by: Nhut Nguyen <[email protected]>
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‎drivers/rz/README

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Renesas Electronics Corporation
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RZ/G: https://github.com/renesas/rzg-fsp
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RZ/N: https://github.com/renesas/rzn-fsp
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RZ/T: https://github.com/renesas/rzt-fsp
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Status:
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RZ/G FSP: version v2.1.0
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RZ/N FSP: version v2.1.0
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RZ/T FSP: version v2.2.0
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Purpose:
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Flexible Software Package (FSP) for Renesas RZ MPU Family.
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https://github.com/renesas/rzn-fsp
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Commit: dcdc687a97844038f909186c938aab98c056175d
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https://github.com/renesas/rzt-fsp
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Commit: e66ab13216949c9ce5a09555171c422d5a323f1b
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Maintained-by:
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Renesas Electronics Corporation
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‎drivers/rz/fsp/inc/instances/rzt/fsp_common_api.h

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‎drivers/rz/fsp/inc/instances/rzt/fsp_version.h

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/*
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* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef FSP_VERSION_H
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#define FSP_VERSION_H
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/***********************************************************************************************************************
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* Includes
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**********************************************************************************************************************/
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/* Includes board and MCU related header files. */
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#include "bsp_api.h"
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/*******************************************************************************************************************//**
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* @addtogroup RENESAS_COMMON
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* @{
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**********************************************************************************************************************/
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/**********************************************************************************************************************
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* Macro definitions
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**********************************************************************************************************************/
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/** FSP pack major version. */
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#define FSP_VERSION_MAJOR (2U)
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/** FSP pack minor version. */
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#define FSP_VERSION_MINOR (2U)
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/** FSP pack patch version. */
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#define FSP_VERSION_PATCH (0U)
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/** FSP pack version build number (currently unused). */
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#define FSP_VERSION_BUILD (0U)
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/** Public FSP version name. */
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#define FSP_VERSION_STRING ("2.2.0")
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/** Unique FSP version ID. */
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#define FSP_VERSION_BUILD_STRING ("Built with RZ/T Flexible Software Package version 2.2.0")
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/**********************************************************************************************************************
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* Typedef definitions
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**********************************************************************************************************************/
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/** FSP Pack version structure */
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typedef union st_fsp_pack_version
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{
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/** Version id */
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uint32_t version_id;
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/** Code version parameters, little endian order. */
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struct version_id_b_s
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{
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uint8_t build; ///< Build version of FSP Pack
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uint8_t patch; ///< Patch version of FSP Pack
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uint8_t minor; ///< Minor version of FSP Pack
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uint8_t major; ///< Major version of FSP Pack
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} version_id_b;
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} fsp_pack_version_t;
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/** @} */
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#endif

‎drivers/rz/fsp/src/rzt/CMakeLists.txt

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# SPDX-License-Identifier: Apache-2.0
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zephyr_compile_definitions(_RZT_ORDINAL=1)
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zephyr_compile_definitions(BSP_CFG_RAM_EXECUTION=1)
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set(srcs
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bsp/cmsis/Device/RENESAS/Source/system.c
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bsp/mcu/all/bsp_clocks.c
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bsp/mcu/all/bsp_common.c
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bsp/mcu/all/bsp_delay.c
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bsp/mcu/all/bsp_io.c
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bsp/mcu/all/bsp_irq.c
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bsp/mcu/all/bsp_register_protection.c
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bsp/mcu/all/cr/bsp_delay_core.c
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)
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zephyr_library_sources(${srcs})

‎drivers/rz/fsp/src/rzt/bsp/cmsis/Device/RENESAS/Include/R9A07G074.h

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‎drivers/rz/fsp/src/rzt/bsp/cmsis/Device/RENESAS/Include/renesas.h

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/*
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* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/* Ensure Renesas MCU variation definitions are included to ensure MCU
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* specific register variations are handled correctly. */
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#ifndef BSP_FEATURE_H
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#error "INTERNAL ERROR: bsp_feature.h must be included before renesas.h."
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#endif
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/** @addtogroup Renesas Electronics Corporation
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* @{
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*/
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/** @addtogroup RZT2
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* @{
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*/
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#ifndef RZT2_H
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#define RZT2_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "../../../../mcu/all/bsp_compiler_support.h"
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/* Define compiler macros for CPU architecture, used in CMSIS 5. */
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#if defined(__ICCARM__)
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#if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__
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/* Macros already defined */
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#else
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#if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
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#define __ARM_ARCH_8M_MAIN__ 1
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#elif defined(__ARM8M_BASELINE__)
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#define __ARM_ARCH_8M_BASE__ 1
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#elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'
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#if __ARM_ARCH == 6
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#define __ARM_ARCH_6M__ 1
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#elif __ARM_ARCH == 7
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#if __ARM_FEATURE_DSP
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#define __ARM_ARCH_7EM__ 1
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#else
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#define __ARM_ARCH_7M__ 1
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#endif
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#endif /* __ARM_ARCH */
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#endif /* __ARM_ARCH_PROFILE == 'M' */
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#endif
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/* Alternative core deduction for older ICCARM's */
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#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \
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!defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__)
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#if defined(__ARM6M__) && (__CORE__ == __ARM6M__)
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#define __ARM_ARCH_6M__ 1
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#elif defined(__ARM7M__) && (__CORE__ == __ARM7M__)
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#define __ARM_ARCH_7M__ 1
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#elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__)
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#define __ARM_ARCH_7EM__ 1
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#elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__)
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#define __ARM_ARCH_8M_BASE__ 1
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#elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__)
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#define __ARM_ARCH_8M_MAIN__ 1
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#elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__)
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#define __ARM_ARCH_8M_MAIN__ 1
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#elif defined(__ARM8R__) && (__CORE__ == __ARM8R__)
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#define __ARM_ARCH_8R__ 1
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#elif defined(__ARM8A__) && (__CORE__ == __ARM8A__)
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#define __ARM_ARCH_8A__ 1
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#else
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#error "Unknown target."
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#endif
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#endif
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#endif
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/** @addtogroup Configuration_of_CMSIS
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* @{
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*/
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/* =========================================================================================================================== */
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/* ================ Interrupt Number Definition ================ */
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/* =========================================================================================================================== */
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/* IRQn_Type is generated as part of an FSP project. It can be found in vector_data.h. */
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/** @} */ /* End of group Configuration_of_CMSIS */
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/* =========================================================================================================================== */
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/* ================ Processor and Core Peripheral Section ================ */
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/* =========================================================================================================================== */
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#if __ARM_ARCH_7EM__
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#define RENESAS_CORTEX_M4
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#elif __ARM_ARCH_6M__
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#define RENESAS_CORTEX_M0PLUS
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#elif __ARM_ARCH_8M_BASE__
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#define RENESAS_CORTEX_M23
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#elif __ARM_ARCH_8M_MAIN__
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#define RENESAS_CORTEX_M33
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#elif __ARM_ARCH_8R__
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#define RENESAS_CORTEX_R52
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#elif __ARM_ARCH_8A__ || __ARM_ARCH_8A
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#define RENESAS_CORTEX_A55
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#else
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#warning Unsupported Architecture
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#endif
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#if BSP_MCU_GROUP_RZT2M
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#include "R9A07G075.h"
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#elif BSP_MCU_GROUP_RZT2L
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#include "R9A07G074.h"
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#elif BSP_MCU_GROUP_RZT2ME
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#include "R9A07G075M29.h"
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#elif BSP_MCU_GROUP_RZT2H
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#include "R9A09G077.h"
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#else
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#warning Unsupported MCU
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* RZT2_H */
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/** @} */ /* End of group RZT2 */
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/** @} */ /* End of group Renesas Electronics Corporation */

‎drivers/rz/fsp/src/rzt/bsp/cmsis/Device/RENESAS/Include/system.h

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/*
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* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef SYSTEM_RENESAS_ARM_H
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#define SYSTEM_RENESAS_ARM_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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extern uint32_t SystemCoreClock; /** System Clock Frequency (Core Clock) */
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/**
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* Initialize the system
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*
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* @param none
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* @return none
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*
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* @brief Setup the microcontroller system.
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* Initialize the System and update the SystemCoreClock variable.
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*/
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extern void SystemInit(void);
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/**
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* Update SystemCoreClock variable
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*
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* @param none
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* @return none
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*
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* @brief Updates the SystemCoreClock with current core Clock
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* retrieved from cpu registers.
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*/
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extern void SystemCoreClockUpdate(void);
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#ifdef __cplusplus
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}
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#endif
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#endif

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