Skip to content

Commit 0c59758

Browse files
quytranpzzduynguyenxa
quytranpzz
authored and
duynguyenxa
committed
hal: renesas: Add support for RA2L1
Add initial support for RA2L1 Signed-off-by: Quy Tran <[email protected]>
1 parent 4331fe3 commit 0c59758

File tree

12 files changed

+19589
-0
lines changed

12 files changed

+19589
-0
lines changed

‎drivers/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA2L1AB.h‎

Lines changed: 18012 additions & 0 deletions
Large diffs are not rendered by default.

‎drivers/ra/fsp/src/bsp/mcu/ra2l1/bsp_elc.h‎

Lines changed: 632 additions & 0 deletions
Large diffs are not rendered by default.

‎drivers/ra/fsp/src/bsp/mcu/ra2l1/bsp_feature.h‎

Lines changed: 441 additions & 0 deletions
Large diffs are not rendered by default.

‎drivers/ra/fsp/src/bsp/mcu/ra2l1/bsp_feature_gen.h‎

Lines changed: 40 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,40 @@
1+
/*
2+
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
3+
*
4+
* SPDX-License-Identifier: BSD-3-Clause
5+
*/
6+
7+
#ifndef BSP_FEATURE_GEN_H
8+
#define BSP_FEATURE_GEN_H
9+
10+
/***********************************************************************************************************************
11+
* Includes <System Includes> , "Project Includes"
12+
**********************************************************************************************************************/
13+
14+
/***********************************************************************************************************************
15+
* Macro definitions
16+
**********************************************************************************************************************/
17+
18+
/***********************************************************************************************************************
19+
* Typedef definitions
20+
**********************************************************************************************************************/
21+
22+
/***********************************************************************************************************************
23+
* Exported global variables (to be accessed by other files)
24+
**********************************************************************************************************************/
25+
26+
/***********************************************************************************************************************
27+
* Private global variables and functions
28+
**********************************************************************************************************************/
29+
30+
// *UNCRUSTIFY-OFF*
31+
#define BSP_FEATURE_GPT_AD_DIRECT_START_CHANNEL_MASK (0)
32+
#define BSP_FEATURE_GPT_AD_DIRECT_START_SUPPORTED (0)
33+
#define BSP_FEATURE_GPT_GPTE_CHANNEL_MASK (0)
34+
#define BSP_FEATURE_GPT_GPTE_SUPPORTED (0)
35+
#define BSP_FEATURE_GPT_GPTEH_CHANNEL_MASK (0)
36+
#define BSP_FEATURE_GPT_GPTEH_SUPPORTED (0)
37+
#define BSP_FEATURE_GPT_OPS_CHANNEL_MASK (0)
38+
#define BSP_FEATURE_GPT_OPS_SUPPORTED (0)
39+
// *UNCRUSTIFY-ON*
40+
#endif

‎drivers/ra/fsp/src/bsp/mcu/ra2l1/bsp_mcu_info.h‎

Lines changed: 45 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,45 @@
1+
/*
2+
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
3+
*
4+
* SPDX-License-Identifier: BSD-3-Clause
5+
*/
6+
7+
/*******************************************************************************************************************//**
8+
* @ingroup BSP_MCU
9+
* @defgroup BSP_MCU_RA2L1 RA2L1
10+
* @includedoc config_bsp_ra2l1_fsp.html
11+
* @{
12+
**********************************************************************************************************************/
13+
14+
#ifndef BSP_MCU_INFO_H
15+
#define BSP_MCU_INFO_H
16+
17+
/***********************************************************************************************************************
18+
* Includes <System Includes> , "Project Includes"
19+
**********************************************************************************************************************/
20+
21+
/* BSP MCU Specific Includes. */
22+
#include "bsp_elc.h"
23+
#include "bsp_feature.h"
24+
#include "bsp_power.h"
25+
26+
/***********************************************************************************************************************
27+
* Macro definitions
28+
**********************************************************************************************************************/
29+
30+
/***********************************************************************************************************************
31+
* Typedef definitions
32+
**********************************************************************************************************************/
33+
typedef icu_event_t bsp_interrupt_event_t;
34+
35+
/***********************************************************************************************************************
36+
* Exported global variables
37+
**********************************************************************************************************************/
38+
39+
/***********************************************************************************************************************
40+
* Exported global functions (to be accessed by other files)
41+
**********************************************************************************************************************/
42+
43+
#endif
44+
45+
/** @} (end defgroup BSP_MCU_RA2L1) */

‎drivers/ra/fsp/src/bsp/mcu/ra2l1/bsp_power.c‎

Lines changed: 156 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,156 @@
1+
/*
2+
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
3+
*
4+
* SPDX-License-Identifier: BSD-3-Clause
5+
*/
6+
7+
/***********************************************************************************************************************
8+
* Includes <System Includes> , "Project Includes"
9+
**********************************************************************************************************************/
10+
#include <stdint.h>
11+
#include "bsp_api.h"
12+
13+
#if BSP_PRV_POWER_USE_DCDC
14+
15+
/***********************************************************************************************************************
16+
* Macro definitions
17+
**********************************************************************************************************************/
18+
#define BSP_PRV_LDO_STABILIZATION_TIME_US (60U)
19+
20+
/***********************************************************************************************************************
21+
* Typedef definitions
22+
**********************************************************************************************************************/
23+
24+
/***********************************************************************************************************************
25+
* Switch from DCDC to LDO. Requires LPM register protection and interrupts to be disabled.
26+
*
27+
* This function follows the procedure given in the RA2L1 User's Manual (R01UH0853EJ0100) Section 10.5.1 (4) "Switching
28+
* from High-speed/Middle-speed mode (DCDC power mode) to High-speed/Middle-speed mode (LDO power mode)"
29+
**********************************************************************************************************************/
30+
static inline void bsp_power_dcdc_disable (bsp_power_mode_t mode)
31+
{
32+
/* Save all module stop bits, then stop all peripherals. */
33+
uint32_t mstpcrb = R_MSTP->MSTPCRB;
34+
R_MSTP->MSTPCRB = UINT32_MAX;
35+
uint32_t mstpcrc = R_MSTP->MSTPCRC;
36+
R_MSTP->MSTPCRC = UINT32_MAX;
37+
uint32_t mstpcrd = R_MSTP->MSTPCRD;
38+
R_MSTP->MSTPCRD = UINT32_MAX;
39+
40+
/* Switch to LDO. */
41+
R_SYSTEM->DCDCCTL = (uint8_t) mode;
42+
43+
/* Wait for LDO to stabilize. */
44+
R_BSP_SoftwareDelay(BSP_PRV_LDO_STABILIZATION_TIME_US, BSP_DELAY_UNITS_MICROSECONDS);
45+
46+
/* Restore all module stop bits. */
47+
R_MSTP->MSTPCRB = mstpcrb;
48+
R_MSTP->MSTPCRC = mstpcrc;
49+
R_MSTP->MSTPCRD = mstpcrd;
50+
}
51+
52+
/***********************************************************************************************************************
53+
* Switch from LDO to DCDC. Requires LPM register protection and interrupts to be disabled.
54+
*
55+
* This function follows the procedure given in the RA2L1 User's Manual (R01UH0853EJ0100) Section 10.5.1 (3) "Switching
56+
* from the High-Speed/Middle-Speed mode (LDO power mode) to the High-speed/Middle speed mode (DCDC power mode)"
57+
**********************************************************************************************************************/
58+
static inline void bsp_power_dcdc_enable (void)
59+
{
60+
/* Enable DCDC IO buffer. */
61+
uint8_t dcdcctl = R_SYSTEM->DCDCCTL | R_SYSTEM_DCDCCTL_STOPZA_Msk;
62+
R_SYSTEM->DCDCCTL = dcdcctl;
63+
64+
/* Turn on DCDC Vref. */
65+
R_SYSTEM->DCDCCTL = dcdcctl & (uint8_t) (~R_SYSTEM_DCDCCTL_PD_Msk);
66+
67+
/* Wait for Vref to stabilize. */
68+
R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MICROSECONDS);
69+
70+
/* Switch DCDC Vref to low-power mode. */
71+
R_SYSTEM->DCDCCTL = 0x10;
72+
73+
/* Wait for Vref to stabilize. */
74+
R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MICROSECONDS);
75+
76+
/* Turn off LDO and turn on DCDC. */
77+
R_SYSTEM->DCDCCTL = 0x11;
78+
79+
/* Wait for DCDC to stabilize. */
80+
R_BSP_SoftwareDelay(2, BSP_DELAY_UNITS_MICROSECONDS);
81+
82+
/* Enable DCDC overcurrent protection. */
83+
R_SYSTEM->DCDCCTL = 0x13;
84+
}
85+
86+
/*******************************************************************************************************************//**
87+
* @addtogroup BSP_MCU_RA2L1
88+
* @{
89+
**********************************************************************************************************************/
90+
91+
/*******************************************************************************************************************//**
92+
* Select either the LDO or DCDC regulator and/or update the MCU supply voltage range. Returns the previously selected
93+
* mode.
94+
*
95+
* @note DCDC mode has the following limitations:
96+
* - Supply voltage must be 2.4V or greater
97+
* - Low- and Subosc-speed modes are not available
98+
* - Software Standby is not available
99+
* Ensure these limitations are respected before entering DCDC mode. If supply voltage may drop below 2.4V during
100+
* operation, configure a LVD channel to interrupt or reset the MCU near this threshold to switch back to the LDO.
101+
*
102+
* @note Switching to DCDC mode temporarily disables all interrupts and blocks for 22 microseconds; switching to LDO
103+
* from DCDC temporarily disables all peripherals and interrupts and blocks for 60 microseconds.
104+
*
105+
* @note If the supply voltage falls outside the range originally specified when starting the DCDC regulator, call this
106+
* function again with the updated supply voltage.
107+
*
108+
* @return The previously selected power mode.
109+
**********************************************************************************************************************/
110+
bsp_power_mode_t R_BSP_PowerModeSet (bsp_power_mode_t mode)
111+
{
112+
/* Get current mode to return to caller. */
113+
bsp_power_mode_t previous_mode = R_SYSTEM->DCDCCTL & R_SYSTEM_DCDCCTL_DCDCON_Msk ?
114+
(bsp_power_mode_t) R_SYSTEM->VCCSEL : BSP_POWER_MODE_LDO;
115+
116+
/* Enable writing to Low Power Mode registers. */
117+
R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_OM_LPC_BATT);
118+
119+
/* Set VCCSEL if a DCDC mode is selected. */
120+
bool dcdc_mode = mode < BSP_POWER_MODE_LDO;
121+
if (dcdc_mode)
122+
{
123+
/* Set supply voltage range. */
124+
R_SYSTEM->VCCSEL = (uint8_t) mode;
125+
}
126+
127+
/* Only change mode if the specified mode is not already set. */
128+
if (dcdc_mode != (previous_mode < BSP_POWER_MODE_LDO))
129+
{
130+
/* Enter critical section to prevent any peripheral or power mode changes while transitioning. */
131+
FSP_CRITICAL_SECTION_DEFINE;
132+
FSP_CRITICAL_SECTION_ENTER;
133+
134+
if (mode >= BSP_POWER_MODE_LDO)
135+
{
136+
bsp_power_dcdc_disable(mode);
137+
}
138+
else
139+
{
140+
bsp_power_dcdc_enable();
141+
}
142+
143+
FSP_CRITICAL_SECTION_EXIT;
144+
}
145+
146+
/* Disable writing to Low Power Mode registers. */
147+
R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_OM_LPC_BATT);
148+
149+
return previous_mode;
150+
}
151+
152+
/*******************************************************************************************************************//**
153+
* @} (end addtogroup BSP_MCU_RA2L1)
154+
**********************************************************************************************************************/
155+
156+
#endif /* BSP_PRV_POWER_USE_DCDC */

‎drivers/ra/fsp/src/bsp/mcu/ra2l1/bsp_power.h‎

Lines changed: 61 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,61 @@
1+
/*
2+
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
3+
*
4+
* SPDX-License-Identifier: BSD-3-Clause
5+
*/
6+
7+
#ifndef BSP_POWER_H
8+
#define BSP_POWER_H
9+
10+
/** Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
11+
FSP_HEADER
12+
13+
/*******************************************************************************************************************//**
14+
* @addtogroup BSP_MCU_RA2L1
15+
* @{
16+
**********************************************************************************************************************/
17+
18+
/***********************************************************************************************************************
19+
* Macro definitions
20+
**********************************************************************************************************************/
21+
#if BSP_FEATURE_BSP_HAS_DCDC_REGULATOR
22+
#define BSP_PRV_POWER_USE_DCDC (BSP_CFG_DCDC_ENABLE)
23+
#else
24+
#define BSP_PRV_POWER_USE_DCDC (0)
25+
#endif
26+
27+
#define BSP_PRV_POWER_DCDC_DISABLE (0)
28+
#define BSP_PRV_POWER_DCDC_MANUAL (1)
29+
#define BSP_PRV_POWER_DCDC_STARTUP (2)
30+
31+
/***********************************************************************************************************************
32+
* Typedef definitions
33+
**********************************************************************************************************************/
34+
35+
/** Voltage regulator mode */
36+
typedef enum e_bsp_power_mode_t
37+
{
38+
BSP_POWER_MODE_DCDC_2V4_TO_2V7 = 3, ///< DCDC mode; 2.4V to 2.7V supply
39+
BSP_POWER_MODE_DCDC_2V7_TO_3V6 = 0, ///< DCDC mode; 2.7V to 3.6V supply
40+
BSP_POWER_MODE_DCDC_3V6_TO_4V5 = 1, ///< DCDC mode; 3.6V to 4.5V supply
41+
BSP_POWER_MODE_DCDC_4V5_TO_5V5 = 2, ///< DCDC mode; 4.5V to 5.5V supply
42+
43+
BSP_POWER_MODE_LDO = 0x90, ///< LDO mode
44+
BSP_POWER_MODE_LDO_BOOST = 0xB0 // Alternate DCDCCTL value for entering subclock and low-power modes
45+
// (see RA2L1 User's Manual (R01UH0853EJ0100) Section 10.5.1 (5))
46+
} bsp_power_mode_t;
47+
48+
/***********************************************************************************************************************
49+
* Exported global functions (to be accessed by other files)
50+
**********************************************************************************************************************/
51+
52+
bsp_power_mode_t R_BSP_PowerModeSet(bsp_power_mode_t mode);
53+
54+
/*******************************************************************************************************************//**
55+
* @} (end addtogroup BSP_MCU_RA2L1)
56+
**********************************************************************************************************************/
57+
58+
/** Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
59+
FSP_FOOTER
60+
61+
#endif

‎zephyr/ra/ra_cfg/fsp_cfg/bsp/ra2l1/bsp_cfg.h‎

Lines changed: 45 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,45 @@
1+
/*
2+
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
3+
*
4+
* SPDX-License-Identifier: BSD-3-Clause
5+
*/
6+
7+
#ifndef BSP_CFG_H_
8+
#define BSP_CFG_H_
9+
10+
#include "soc.h"
11+
#include "bsp_clock_cfg.h"
12+
#include "bsp_mcu_family_cfg.h"
13+
14+
#define SUBCLOCK_STABILIZATION_MAX(x) ((x < 10000) ? x : 10000)
15+
16+
/* Disable BSP_CFG_PARAM_CHECKING_ENABLE as default to reduce code size */
17+
#define BSP_CFG_PARAM_CHECKING_ENABLE (0)
18+
19+
/* Add for zephyr porting */
20+
#define BSP_CFG_INTERRUPT_INIT 0
21+
22+
#ifndef BSP_CLOCK_CFG_MAIN_OSC_POPULATED
23+
#define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (DT_NODE_HAS_STATUS(DT_NODELABEL(xtal), okay))
24+
#endif
25+
26+
#ifndef BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE
27+
#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE (DT_PROP_OR(DT_NODELABEL(xtal), mosel, 0))
28+
#endif
29+
30+
/* Keep 0 as default as LPM is not supported */
31+
#ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
32+
#define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (DT_PROP_OR(DT_NODELABEL(subclk), drive_capability, 0))
33+
#endif
34+
35+
#ifndef BSP_CLOCK_CFG_SUBCLOCK_POPULATED
36+
#define BSP_CLOCK_CFG_SUBCLOCK_POPULATED (DT_NODE_HAS_STATUS(DT_NODELABEL(subclk), okay))
37+
#endif
38+
#ifndef BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS
39+
#define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS \
40+
SUBCLOCK_STABILIZATION_MAX((DT_PROP_OR(DT_NODELABEL(subclk), stabilization_time, 1000)))
41+
#endif
42+
43+
#define BSP_CFG_PFS_PROTECT (1)
44+
45+
#endif /* BSP_CFG_H_ */

‎zephyr/ra/ra_cfg/fsp_cfg/bsp/ra2l1/bsp_clock_cfg.h‎

Lines changed: 47 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,47 @@
1+
/*
2+
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
3+
*
4+
* SPDX-License-Identifier: BSD-3-Clause
5+
*/
6+
7+
#include <zephyr/devicetree.h>
8+
#include <zephyr/dt-bindings/clock/ra_clock.h>
9+
10+
#ifndef BSP_CLOCK_CFG_H_
11+
#define BSP_CLOCK_CFG_H_
12+
13+
#define BSP_CFG_CLOCKS_SECURE (0)
14+
#define BSP_CFG_CLOCKS_OVERRIDE (0)
15+
#define BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(node_id, prop, default_value) \
16+
(COND_CODE_1(DT_NODE_HAS_STATUS(node_id, okay), (DT_PROP(node_id, prop)), (default_value)))
17+
18+
#define BSP_CFG_XTAL_HZ BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(xtal), clock_frequency, 0)
19+
20+
#if DT_PROP(DT_NODELABEL(hoco), clock_frequency) == 24000000
21+
#define BSP_CFG_HOCO_FREQUENCY 0 /* HOCO 24MHz */
22+
#elif DT_PROP(DT_NODELABEL(hoco), clock_frequency) == 32000000
23+
#define BSP_CFG_HOCO_FREQUENCY 2 /* HOCO 32MHz */
24+
#elif DT_PROP(DT_NODELABEL(hoco), clock_frequency) == 48000000
25+
#define BSP_CFG_HOCO_FREQUENCY 4 /* HOCO 48MHz */
26+
#elif DT_PROP(DT_NODELABEL(hoco), clock_frequency) == 64000000
27+
#define BSP_CFG_HOCO_FREQUENCY 5 /* HOCO 64MHz */
28+
#else
29+
#error "Invalid HOCO frequency, only can be set to 24MHz, 32MHz, 48MHz, 64MHz"
30+
#endif
31+
32+
#define BSP_CFG_CLOCK_SOURCE \
33+
BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(pclkblock), sysclock_src, \
34+
RA_CLOCK_SOURCE_DISABLE)
35+
36+
#define BSP_CFG_ICLK_DIV \
37+
BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(iclk), clk_div, RA_SYS_CLOCK_DIV_2)
38+
#define BSP_CFG_PCLKB_DIV \
39+
BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(pclkb), clk_div, RA_SYS_CLOCK_DIV_2)
40+
#define BSP_CFG_PCLKD_DIV \
41+
BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(pclkd), clk_div, RA_SYS_CLOCK_DIV_1)
42+
43+
#define BSP_CFG_CLKOUT_SOURCE \
44+
BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(clkout), clk_src, RA_CLOCK_SOURCE_DISABLE)
45+
#define BSP_CFG_CLKOUT_DIV BSP_CLOCK_PROP_HAS_STATUS_OKAY_OR(DT_NODELABEL(clkout), clk_div, 0)
46+
47+
#endif /* BSP_CLOCK_CFG_H_ */

0 commit comments

Comments
 (0)