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| 1 | +/* |
| 2 | +* Copyright (c) 2020 - 2025 Renesas Electronics Corporation and/or its affiliates |
| 3 | +* |
| 4 | +* SPDX-License-Identifier: BSD-3-Clause |
| 5 | +*/ |
| 6 | + |
| 7 | +/*******************************************************************************************************************//** |
| 8 | + * @addtogroup SCI_I2C |
| 9 | + * @{ |
| 10 | + **********************************************************************************************************************/ |
| 11 | + |
| 12 | +#ifndef R_SCI_I2C_H |
| 13 | +#define R_SCI_I2C_H |
| 14 | + |
| 15 | +#include "bsp_api.h" |
| 16 | +#include "r_sci_i2c_cfg.h" |
| 17 | +#include "r_i2c_master_api.h" |
| 18 | + |
| 19 | +/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */ |
| 20 | +FSP_HEADER |
| 21 | + |
| 22 | +/*********************************************************************************************************************** |
| 23 | + * Macro definitions |
| 24 | + **********************************************************************************************************************/ |
| 25 | + |
| 26 | +/*********************************************************************************************************************** |
| 27 | + * Typedef definitions |
| 28 | + **********************************************************************************************************************/ |
| 29 | + |
| 30 | +/** I2C clock settings */ |
| 31 | +typedef struct sci_i2c_clock_settings |
| 32 | +{ |
| 33 | + bool bitrate_modulation; ///< Bit-rate Modulation Function enable or disable |
| 34 | + uint8_t brr_value; ///< Bit rate register settings |
| 35 | + uint8_t clk_divisor_value; ///< Clock Select settings |
| 36 | + uint8_t mddr_value; ///< Modulation Duty Register settings |
| 37 | + uint8_t cycles_value; ///< SDA Delay Output Cycles Select |
| 38 | + uint8_t snfr_value; ///< Noise Filter Setting Register value |
| 39 | +} sci_i2c_clock_settings_t; |
| 40 | + |
| 41 | +/** I2C control structure. DO NOT INITIALIZE. */ |
| 42 | +typedef struct st_sci_i2c_instance_ctrl |
| 43 | +{ |
| 44 | + i2c_master_cfg_t const * p_cfg; // Pointer to the configuration structure |
| 45 | + uint32_t slave; // The address of the slave device |
| 46 | + i2c_master_addr_mode_t addr_mode; // Indicates how slave fields should be interpreted |
| 47 | + uint32_t open; // Flag to determine if the device is open |
| 48 | + R_SCI0_Type * p_reg; // Base register for this channel |
| 49 | + |
| 50 | + IRQn_Type rxi_irq; // Receive IRQ number |
| 51 | + IRQn_Type txi_irq; // Transmit IRQ number |
| 52 | + IRQn_Type tei_irq; // Transmit end IRQ number |
| 53 | + |
| 54 | + /* Current transfer information. */ |
| 55 | + uint8_t * p_buff; // Holds the data associated with the transfer */ |
| 56 | + uint32_t total; // Holds the total number of data bytes to transfer */ |
| 57 | + uint32_t remain; // Tracks the remaining data bytes to transfer */ |
| 58 | + uint32_t loaded; // Tracks the number of data bytes written to the register */ |
| 59 | + |
| 60 | + uint8_t addr_low; // Holds the last address byte to issue */ |
| 61 | + uint8_t addr_high; // Holds the first address byte to issue in 10-bit mode */ |
| 62 | + uint8_t addr_total; // Holds the total number of address bytes to transfer */ |
| 63 | + uint8_t addr_remain; // Tracks the remaining address bytes to transfer */ |
| 64 | + uint8_t addr_loaded; // Tracks the number of address bytes written to the register */ |
| 65 | + |
| 66 | + volatile bool read; // Holds the direction of the data byte transfer */ |
| 67 | + volatile bool restart; // Holds whether or not the restart should be issued when done */ |
| 68 | + volatile bool err; // Tracks whether or not an error occurred during processing */ |
| 69 | + volatile bool restarted; // Tracks whether or not a restart was issued during the previous transfer */ |
| 70 | + volatile bool do_dummy_read; // Tracks whether a dummy read is issued on the first RX */ |
| 71 | + volatile bool activation_on_rxi; // Tracks whether the transfer is activated on RXI interrupt */ |
| 72 | + volatile bool activation_on_txi; // Tracks whether the transfer is activated on TXI interrupt */ |
| 73 | + |
| 74 | + /* Pointer to callback and optional working memory */ |
| 75 | + void (* p_callback)(i2c_master_callback_args_t *); |
| 76 | + i2c_master_callback_args_t * p_callback_memory; |
| 77 | + |
| 78 | + /* Pointer to context to be passed into callback function */ |
| 79 | + void const * p_context; |
| 80 | +} sci_i2c_instance_ctrl_t; |
| 81 | + |
| 82 | +/** SCI I2C extended configuration */ |
| 83 | +typedef struct st_sci_i2c_extended_cfg |
| 84 | +{ |
| 85 | + sci_i2c_clock_settings_t clock_settings; ///< I2C Clock settings |
| 86 | +} sci_i2c_extended_cfg_t; |
| 87 | + |
| 88 | +/********************************************************************************************************************** |
| 89 | + * Exported global variables |
| 90 | + **********************************************************************************************************************/ |
| 91 | + |
| 92 | +/** @cond INC_HEADER_DEFS_SEC */ |
| 93 | +/** Filled in Interface API structure for this Instance. */ |
| 94 | +extern i2c_master_api_t const g_i2c_master_on_sci; |
| 95 | + |
| 96 | +/** @endcond */ |
| 97 | + |
| 98 | +/*********************************************************************************************************************** |
| 99 | + * Public APIs |
| 100 | + **********************************************************************************************************************/ |
| 101 | +fsp_err_t R_SCI_I2C_Open(i2c_master_ctrl_t * const p_api_ctrl, i2c_master_cfg_t const * const p_cfg); |
| 102 | +fsp_err_t R_SCI_I2C_Close(i2c_master_ctrl_t * const p_api_ctrl); |
| 103 | +fsp_err_t R_SCI_I2C_Read(i2c_master_ctrl_t * const p_api_ctrl, |
| 104 | + uint8_t * const p_dest, |
| 105 | + uint32_t const bytes, |
| 106 | + bool const restart); |
| 107 | +fsp_err_t R_SCI_I2C_Write(i2c_master_ctrl_t * const p_api_ctrl, |
| 108 | + uint8_t * const p_src, |
| 109 | + uint32_t const bytes, |
| 110 | + bool const restart); |
| 111 | +fsp_err_t R_SCI_I2C_Abort(i2c_master_ctrl_t * const p_api_ctrl); |
| 112 | +fsp_err_t R_SCI_I2C_SlaveAddressSet(i2c_master_ctrl_t * const p_api_ctrl, |
| 113 | + uint32_t const slave, |
| 114 | + i2c_master_addr_mode_t const addr_mode); |
| 115 | +fsp_err_t R_SCI_I2C_CallbackSet(i2c_master_ctrl_t * const p_api_ctrl, |
| 116 | + void ( * p_callback)(i2c_master_callback_args_t *), |
| 117 | + void const * const p_context, |
| 118 | + i2c_master_callback_args_t * const p_callback_memory); |
| 119 | +fsp_err_t R_SCI_I2C_StatusGet(i2c_master_ctrl_t * const p_api_ctrl, i2c_master_status_t * p_status); |
| 120 | + |
| 121 | +/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ |
| 122 | +FSP_FOOTER |
| 123 | + |
| 124 | +#endif |
| 125 | + |
| 126 | +/*******************************************************************************************************************//** |
| 127 | + * @} (end defgroup SCI_I2C) |
| 128 | + **********************************************************************************************************************/ |
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