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| 1 | +/* |
| 2 | +* Copyright (c) 2020 - 2025 Renesas Electronics Corporation and/or its affiliates |
| 3 | +* |
| 4 | +* SPDX-License-Identifier: BSD-3-Clause |
| 5 | +*/ |
| 6 | + |
| 7 | +/*********************************************************************************************************************** |
| 8 | + * Includes |
| 9 | + **********************************************************************************************************************/ |
| 10 | +#include "r_sci_b_spi.h" |
| 11 | +#include "r_sci_b_spi_cfg.h" |
| 12 | + |
| 13 | +/*********************************************************************************************************************** |
| 14 | + * Macro definitions |
| 15 | + **********************************************************************************************************************/ |
| 16 | +#define SCI_B_SPI_PRV_DATA_REG_MASK (0xFFFFFF00) |
| 17 | +#define SCI_B_SPI_PRV_RDAT_MASK (0xFFU) |
| 18 | + |
| 19 | +/*********************************************************************************************************************** |
| 20 | + * Typedef definitions |
| 21 | + **********************************************************************************************************************/ |
| 22 | + |
| 23 | +/*********************************************************************************************************************** |
| 24 | + * Private function declarations. |
| 25 | + **********************************************************************************************************************/ |
| 26 | + |
| 27 | +/*********************************************************************************************************************** |
| 28 | + * Functions |
| 29 | + **********************************************************************************************************************/ |
| 30 | + |
| 31 | +/*******************************************************************************************************************//** |
| 32 | + * @addtogroup SCI_B_SPI |
| 33 | + * @{ |
| 34 | + **********************************************************************************************************************/ |
| 35 | + |
| 36 | +/*******************************************************************************************************************//** |
| 37 | + * Enable polling data transfer. |
| 38 | + * |
| 39 | + * @param p_api_ctrl Pointer to the control structure. |
| 40 | + * |
| 41 | + * @retval FSP_SUCCESS Read operation successfully completed. |
| 42 | + * @retval FSP_ERR_ASSERTION One of the following invalid parameters passed: |
| 43 | + * - Pointer p_api_ctrl is NULL |
| 44 | + * |
| 45 | + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible return codes. This |
| 46 | + * function calls: |
| 47 | + **********************************************************************************************************************/ |
| 48 | +fsp_err_t RP_SCI_B_SPI_StartTransferPolling (spi_ctrl_t * const p_api_ctrl) |
| 49 | +{ |
| 50 | + sci_b_spi_instance_ctrl_t * p_ctrl = (sci_b_spi_instance_ctrl_t *) p_api_ctrl; |
| 51 | + |
| 52 | +#if SCI_B_SPI_CFG_PARAM_CHECKING_ENABLE |
| 53 | + FSP_ASSERT(NULL != p_ctrl); |
| 54 | +#endif |
| 55 | + |
| 56 | + /* Set FCR. Reset FIFO/data registers. */ |
| 57 | + p_ctrl->p_reg->FCR = (R_SCI_B0_FCR_TFRST_Msk | R_SCI_B0_FCR_RFRST_Msk); |
| 58 | + |
| 59 | + /* Enable transfer data bit */ |
| 60 | + p_ctrl->p_reg->CCR0 |= (R_SCI_B0_CCR0_TE_Msk | R_SCI_B0_CCR0_RE_Msk); |
| 61 | + |
| 62 | + return FSP_SUCCESS; |
| 63 | +} |
| 64 | + |
| 65 | +/*******************************************************************************************************************//** |
| 66 | + * Transmit one byte data to a SPI device by polling. |
| 67 | + * |
| 68 | + * @param p_api_ctrl Pointer to the control structure. |
| 69 | + * @param p_tx_byte Pointer to the source buffer. |
| 70 | + * |
| 71 | + * @retval FSP_SUCCESS Write operation successfully completed. |
| 72 | + * @retval FSP_ERR_ASSERTION One of the following invalid parameters passed: |
| 73 | + * - Pointer p_api_ctrl is NULL |
| 74 | + * - Pointer to source is NULL |
| 75 | + * |
| 76 | + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible return codes. This |
| 77 | + * function calls: |
| 78 | + **********************************************************************************************************************/ |
| 79 | +fsp_err_t RP_SCI_B_SPI_WriteOneBytePolling (spi_ctrl_t * const p_api_ctrl, |
| 80 | + const uint8_t tx_byte) |
| 81 | +{ |
| 82 | + sci_b_spi_instance_ctrl_t * p_ctrl = (sci_b_spi_instance_ctrl_t *) p_api_ctrl; |
| 83 | + |
| 84 | +#if SCI_B_SPI_CFG_PARAM_CHECKING_ENABLE |
| 85 | + FSP_ASSERT(NULL != p_ctrl); |
| 86 | +#endif |
| 87 | + |
| 88 | + /* Wait the TDR data to empty*/ |
| 89 | + while (!p_ctrl->p_reg->CSR_b.TDRE) { |
| 90 | + } |
| 91 | + |
| 92 | + /* Write data to TDR */ |
| 93 | + p_ctrl->p_reg->TDR = (SCI_B_SPI_PRV_DATA_REG_MASK | tx_byte); |
| 94 | + |
| 95 | + return FSP_SUCCESS; |
| 96 | +} |
| 97 | + |
| 98 | +/*******************************************************************************************************************//** |
| 99 | + * Read one byte data from a SPI device by polling. |
| 100 | + * |
| 101 | + * @param p_api_ctrl Pointer to the control structure. |
| 102 | + * @param p_rx_byte Pointer to the source buffer. |
| 103 | + * |
| 104 | + * @retval FSP_SUCCESS Read operation successfully completed. |
| 105 | + * @retval FSP_ERR_ASSERTION One of the following invalid parameters passed: |
| 106 | + * - Pointer p_api_ctrl is NULL |
| 107 | + * - Pointer to source is NULL |
| 108 | + * |
| 109 | + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible return codes. This |
| 110 | + * function calls: |
| 111 | + **********************************************************************************************************************/ |
| 112 | +fsp_err_t RP_SCI_B_SPI_ReadOneBytePolling (spi_ctrl_t * const p_api_ctrl, |
| 113 | + uint8_t * p_rx_byte) |
| 114 | +{ |
| 115 | + sci_b_spi_instance_ctrl_t * p_ctrl = (sci_b_spi_instance_ctrl_t *) p_api_ctrl; |
| 116 | + |
| 117 | +#if SCI_B_SPI_CFG_PARAM_CHECKING_ENABLE |
| 118 | + FSP_ASSERT(NULL != p_ctrl); |
| 119 | + FSP_ASSERT(NULL != p_rx_byte); |
| 120 | +#endif |
| 121 | + |
| 122 | + /* Wait until data available in RDR */ |
| 123 | + while (!p_ctrl->p_reg->CSR_b.RDRF) { |
| 124 | + } |
| 125 | + |
| 126 | + /* Read the data in RDR register */ |
| 127 | + *p_rx_byte = (uint8_t)(p_ctrl->p_reg->RDR & SCI_B_SPI_PRV_RDAT_MASK); |
| 128 | + |
| 129 | + return FSP_SUCCESS; |
| 130 | +} |
| 131 | + |
| 132 | +/*******************************************************************************************************************//** |
| 133 | + * End polling data transfer. |
| 134 | + * |
| 135 | + * @param p_api_ctrl Pointer to the control structure. |
| 136 | + * |
| 137 | + * @retval FSP_SUCCESS Read operation successfully completed. |
| 138 | + * @retval FSP_ERR_ASSERTION One of the following invalid parameters passed: |
| 139 | + * - Pointer p_api_ctrl is NULL |
| 140 | + * |
| 141 | + * @return See @ref RENESAS_ERROR_CODES or functions called by this function for other possible return codes. This |
| 142 | + * function calls: |
| 143 | + **********************************************************************************************************************/ |
| 144 | +fsp_err_t RP_SCI_B_SPI_EndTransferPolling (spi_ctrl_t * const p_api_ctrl) |
| 145 | +{ |
| 146 | + sci_b_spi_instance_ctrl_t * p_ctrl = (sci_b_spi_instance_ctrl_t *) p_api_ctrl; |
| 147 | + uint32_t ccr0_temp; |
| 148 | + |
| 149 | +#if SCI_B_SPI_CFG_PARAM_CHECKING_ENABLE |
| 150 | + FSP_ASSERT(NULL != p_ctrl); |
| 151 | +#endif |
| 152 | + |
| 153 | + /* Wait for transmision complete */ |
| 154 | + FSP_HARDWARE_REGISTER_WAIT(p_ctrl->p_reg->CSR_b.TEND, 1) |
| 155 | + |
| 156 | + /* Disable the transfer and receive bit */ |
| 157 | + ccr0_temp = p_ctrl->p_reg->CCR0; |
| 158 | + ccr0_temp &= (uint32_t)~(R_SCI_B0_CCR0_TE_Msk | R_SCI_B0_CCR0_RE_Msk); |
| 159 | + p_ctrl->p_reg->CCR0 = ccr0_temp; |
| 160 | + |
| 161 | + return FSP_SUCCESS; |
| 162 | +} |
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