|
| 1 | +/* |
| 2 | +* Copyright (c) 2020 - 2025 Renesas Electronics Corporation and/or its affiliates |
| 3 | +* |
| 4 | +* SPDX-License-Identifier: BSD-3-Clause |
| 5 | +*/ |
| 6 | + |
| 7 | +/*******************************************************************************************************************//** |
| 8 | + * @addtogroup BSP_MCU_RA4C1 |
| 9 | + * @{ |
| 10 | + **********************************************************************************************************************/ |
| 11 | + |
| 12 | +/** @} (end addtogroup BSP_MCU_RA4C1) */ |
| 13 | + |
| 14 | +#ifndef BSP_OVERRIDE_H |
| 15 | +#define BSP_OVERRIDE_H |
| 16 | + |
| 17 | +/*********************************************************************************************************************** |
| 18 | + * Includes <System Includes> , "Project Includes" |
| 19 | + **********************************************************************************************************************/ |
| 20 | + |
| 21 | +/*********************************************************************************************************************** |
| 22 | + * Macro definitions |
| 23 | + **********************************************************************************************************************/ |
| 24 | + |
| 25 | +/* Define overrides required for this MCU. */ |
| 26 | +#define BSP_OVERRIDE_LVD_PERIPHERAL_T |
| 27 | +#define BSP_OVERRIDE_LPM_STANDBY_WAKE_SOURCE_T |
| 28 | +#define BSP_OVERRIDE_UART_DATA_BITS_T |
| 29 | + |
| 30 | +/*********************************************************************************************************************** |
| 31 | + * Typedef definitions |
| 32 | + **********************************************************************************************************************/ |
| 33 | + |
| 34 | +/** PLL divider values */ |
| 35 | + |
| 36 | +/** The thresholds supported by each MCU are in the MCU User's Manual as well as |
| 37 | + * in the r_lvd module description on the stack tab of the RA project. */ |
| 38 | +typedef enum |
| 39 | +{ |
| 40 | + LVD_THRESHOLD_MONITOR_1_LEVEL_3_10V = 0x00UL, ///< 3.10V |
| 41 | + LVD_THRESHOLD_MONITOR_1_LEVEL_3_00V = 0x01UL, ///< 3.00V |
| 42 | + LVD_THRESHOLD_MONITOR_1_LEVEL_2_90V = 0x02UL, ///< 2.90V |
| 43 | + LVD_THRESHOLD_MONITOR_1_LEVEL_2_79V = 0x03UL, ///< 2.79V |
| 44 | + LVD_THRESHOLD_MONITOR_1_LEVEL_2_68V = 0x04UL, ///< 2.68V |
| 45 | + LVD_THRESHOLD_MONITOR_1_LEVEL_2_58V = 0x05UL, ///< 2.58V |
| 46 | + LVD_THRESHOLD_MONITOR_1_LEVEL_2_48V = 0x06UL, ///< 2.48V |
| 47 | + LVD_THRESHOLD_MONITOR_1_LEVEL_2_20V = 0x07UL, ///< 2.20V |
| 48 | + LVD_THRESHOLD_MONITOR_1_LEVEL_1_96V = 0x08UL, ///< 1.96V |
| 49 | + LVD_THRESHOLD_MONITOR_1_LEVEL_1_86V = 0x09UL, ///< 1.86V |
| 50 | + LVD_THRESHOLD_MONITOR_1_LEVEL_1_75V = 0x0AUL, ///< 1.75V |
| 51 | + LVD_THRESHOLD_MONITOR_1_LEVEL_1_65V = 0x0BUL, ///< 1.65V |
| 52 | + LVD_THRESHOLD_MONITOR_2_LEVEL_3_13V = 0x00UL, ///< 3.13V |
| 53 | + LVD_THRESHOLD_MONITOR_2_LEVEL_2_92V = 0x01UL, ///< 2.92V |
| 54 | + LVD_THRESHOLD_MONITOR_2_LEVEL_2_71V = 0x02UL, ///< 2.71V |
| 55 | + LVD_THRESHOLD_MONITOR_2_LEVEL_2_50V = 0x03UL, ///< 2.50V |
| 56 | + LVD_THRESHOLD_MONITOR_2_LEVEL_2_30V = 0x04UL, ///< 2.30V |
| 57 | + LVD_THRESHOLD_MONITOR_2_LEVEL_2_09V = 0x05UL, ///< 2.09V |
| 58 | + LVD_THRESHOLD_MONITOR_2_LEVEL_1_88V = 0x06UL, ///< 1.88V |
| 59 | + LVD_THRESHOLD_MONITOR_2_LEVEL_1_67V = 0x07UL, ///< 1.67V |
| 60 | + LVD_THRESHOLD_EXLVDVBAT_LEVEL_3_08V = 0x06UL, ///< 3_08V |
| 61 | + LVD_THRESHOLD_EXLVDVBAT_LEVEL_2_88V = 0x05UL, ///< 2_88V |
| 62 | + LVD_THRESHOLD_EXLVDVBAT_LEVEL_2_68V = 0x04UL, ///< 2_68V |
| 63 | + LVD_THRESHOLD_EXLVDVBAT_LEVEL_2_58V = 0x03UL, ///< 2_58V |
| 64 | + LVD_THRESHOLD_EXLVDVBAT_LEVEL_2_38V = 0x02UL, ///< 2_38V |
| 65 | + LVD_THRESHOLD_EXLVDVBAT_LEVEL_2_18V = 0x01UL, ///< 2_18V |
| 66 | + LVD_THRESHOLD_EXLVDVBAT_LEVEL_1_59V = 0x00UL, ///< 1_59V |
| 67 | + LVD_THRESHOLD_LVDVRTC_LEVEL_2_99V = 0x07UL, ///< 2_99V |
| 68 | + LVD_THRESHOLD_LVDVRTC_LEVEL_2_79V = 0x06UL, ///< 2_79V |
| 69 | + LVD_THRESHOLD_LVDVRTC_LEVEL_2_59V = 0x05UL, ///< 2_59V |
| 70 | + LVD_THRESHOLD_LVDVRTC_LEVEL_2_39V = 0x04UL, ///< 2_39V |
| 71 | + LVD_THRESHOLD_LVDVRTC_LEVEL_2_19V = 0x03UL, ///< 2_19V |
| 72 | + LVD_THRESHOLD_LVDVRTC_LEVEL_1_99V = 0x02UL, ///< 1_99V |
| 73 | + LVD_THRESHOLD_LVDVRTC_LEVEL_1_79V = 0x01UL, ///< 1_79V |
| 74 | + LVD_THRESHOLD_LVDVRTC_LEVEL_1_59V = 0x00UL, ///< 1_59V |
| 75 | + LVD_THRESHOLD_NOT_AVAILABLE = 0xFFUL, ///< Not Used |
| 76 | +} lvd_threshold_t; |
| 77 | + |
| 78 | +/** Wake from deep sleep or standby mode sources, does not apply to sleep or deep standby modes */ |
| 79 | +typedef enum e_lpm_standby_wake_source |
| 80 | +{ |
| 81 | + LPM_STANDBY_WAKE_SOURCE_IRQ0 = 0x00000001ULL, ///< IRQ0 |
| 82 | + LPM_STANDBY_WAKE_SOURCE_IRQ1 = 0x00000002ULL, ///< IRQ1 |
| 83 | + LPM_STANDBY_WAKE_SOURCE_IRQ2 = 0x00000004ULL, ///< IRQ2 |
| 84 | + LPM_STANDBY_WAKE_SOURCE_IRQ3 = 0x00000008ULL, ///< IRQ3 |
| 85 | + LPM_STANDBY_WAKE_SOURCE_IRQ4 = 0x00000010ULL, ///< IRQ4 |
| 86 | + LPM_STANDBY_WAKE_SOURCE_IRQ5 = 0x00000020ULL, ///< IRQ5 |
| 87 | + LPM_STANDBY_WAKE_SOURCE_IRQ6 = 0x00000040ULL, ///< IRQ6 |
| 88 | + LPM_STANDBY_WAKE_SOURCE_IRQ7 = 0x00000080ULL, ///< IRQ7 |
| 89 | + LPM_STANDBY_WAKE_SOURCE_IRQ8 = 0x00000100ULL, ///< IRQ8 |
| 90 | + LPM_STANDBY_WAKE_SOURCE_IRQ9 = 0x00000200ULL, ///< IRQ9 |
| 91 | + LPM_STANDBY_WAKE_SOURCE_IRQ10 = 0x00000400ULL, ///< IRQ10 |
| 92 | + LPM_STANDBY_WAKE_SOURCE_IRQ11 = 0x00000800ULL, ///< IRQ11 |
| 93 | + LPM_STANDBY_WAKE_SOURCE_IRQ12 = 0x00001000ULL, ///< IRQ12 |
| 94 | + LPM_STANDBY_WAKE_SOURCE_IRQ13 = 0x00002000ULL, ///< IRQ13 |
| 95 | + LPM_STANDBY_WAKE_SOURCE_IRQ14 = 0x00004000ULL, ///< IRQ14 |
| 96 | + LPM_STANDBY_WAKE_SOURCE_IRQ15 = 0x00008000ULL, ///< IRQ15 |
| 97 | + LPM_STANDBY_WAKE_SOURCE_IWDT = 0x00010000ULL, ///< Independent watchdog interrupt |
| 98 | + LPM_STANDBY_WAKE_SOURCE_LVD1 = 0x00040000ULL, ///< Low Voltage Detection 1 interrupt |
| 99 | + LPM_STANDBY_WAKE_SOURCE_LVD2 = 0x00080000ULL, ///< Low Voltage Detection 2 interrupt |
| 100 | + LPM_STANDBY_WAKE_SOURCE_RTCALM = 0x01000000ULL, ///< RTC Alarm interrupt |
| 101 | + LPM_STANDBY_WAKE_SOURCE_RTCPRD = 0x02000000ULL, ///< RTC Period interrupt |
| 102 | + LPM_STANDBY_WAKE_SOURCE_AGT1UD = 0x10000000ULL, ///< AGT1 Underflow interrupt |
| 103 | + LPM_STANDBY_WAKE_SOURCE_AGT1CA = 0x20000000ULL, ///< AGT1 Compare Match A interrupt |
| 104 | + LPM_STANDBY_WAKE_SOURCE_AGT1CB = 0x40000000ULL, ///< AGT1 Compare Match B interrupt |
| 105 | + LPM_STANDBY_WAKE_SOURCE_IIC0 = 0x80000000ULL, ///< I2C 0 interrupt |
| 106 | + LPM_STANDBY_WAKE_SOURCE_SOSTD = 0x8000000000ULL, ///< SOSTD interrupt |
| 107 | +} lpm_standby_wake_source_t; |
| 108 | + |
| 109 | +typedef enum e_lpm_standby_wake_source_2 |
| 110 | +{ |
| 111 | + LPM_STANDBY_WAKE_SOURCE_INTUR0 = 0x00000001ULL, ///< UARTA0 INTUR Interrupt |
| 112 | + LPM_STANDBY_WAKE_SOURCE_INTURE0 = 0x00000002ULL, ///< UARTA0 INTURE Interrupt |
| 113 | + LPM_STANDBY_WAKE_SOURCE_INTUR1 = 0x00000004ULL, ///< UARTA1 INTUR Interrupt |
| 114 | + LPM_STANDBY_WAKE_SOURCE_INTURE1 = 0x00000008ULL, ///< UARTA1 INTURE Interrupt |
| 115 | + LPM_STANDBY_WAKE_SOURCE_VBATT = 0x00000010ULL, ///< VBATT Monitor interrupt |
| 116 | + LPM_STANDBY_WAKE_SOURCE_VRTC = 0x00000020ULL, ///< LVDVRTC interrupt |
| 117 | + LPM_STANDBY_WAKE_SOURCE_EXLVD = 0x00000040ULL, ///< LVDEXLVD interrupt |
| 118 | +} lpm_standby_wake_source_2_t; |
| 119 | + |
| 120 | +typedef uint64_t lpm_standby_wake_source_bits_t; |
| 121 | + |
| 122 | +/** UART Data bit length definition */ |
| 123 | +typedef enum e_uart_data_bits |
| 124 | +{ |
| 125 | + UART_DATA_BITS_5 = 0U, ///< Data bits 5-bit |
| 126 | + UART_DATA_BITS_9 = 1U, ///< Data bits 9-bit |
| 127 | + UART_DATA_BITS_7 = 2U, ///< Data bits 7-bit |
| 128 | + UART_DATA_BITS_8 = 3U, ///< Data bits 8-bit |
| 129 | +} uart_data_bits_t; |
| 130 | + |
| 131 | +/*********************************************************************************************************************** |
| 132 | + * Exported global variables |
| 133 | + **********************************************************************************************************************/ |
| 134 | + |
| 135 | +/*********************************************************************************************************************** |
| 136 | + * Exported global functions (to be accessed by other files) |
| 137 | + **********************************************************************************************************************/ |
| 138 | + |
| 139 | +#endif |
0 commit comments