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hal: renesas: rz: Initial support for I2C
Initial HAL support for I2C Signed-off-by: Hoang Nguyen <[email protected]> Signed-off-by: Nhut Nguyen <[email protected]>
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‎drivers/rz/CMakeLists.txt

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zephyr_library_sources_ifdef(CONFIG_USE_RZ_FSP_MHU
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fsp/src/${SOC_SERIES_PREFIX}/r_mhu_ns/r_mhu_ns.c)
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zephyr_library_sources_ifdef(CONFIG_USE_RZ_FSP_RIIC_MASTER
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fsp/src/${SOC_SERIES_PREFIX}/r_riic_master/r_riic_master.c)

‎drivers/rz/fsp/inc/api/r_i2c_master_api.h

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/*
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* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef R_I2C_MASTER_API_H
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#define R_I2C_MASTER_API_H
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/*******************************************************************************************************************//**
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* @ingroup RENESAS_INTERFACES
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* @defgroup I2C_MASTER_API I2C Master Interface
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* @brief Interface for I2C master communication.
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*
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* @section I2C_MASTER_API_SUMMARY Summary
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* The I2C master interface provides a common API for I2C HAL drivers. The I2C master interface supports:
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* - Interrupt driven transmit/receive processing
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* - Callback function support which can return an event code
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*
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* Implemented by:
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* - @ref RIIC_MASTER
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*
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* @{
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**********************************************************************************************************************/
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/***********************************************************************************************************************
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* Includes
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**********************************************************************************************************************/
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/* Register definitions, common services and error codes. */
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#include "bsp_api.h"
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#include "r_transfer_api.h"
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/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
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FSP_HEADER
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/**********************************************************************************************************************
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* Macro definitions
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**********************************************************************************************************************/
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/**********************************************************************************************************************
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* Typedef definitions
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**********************************************************************************************************************/
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/** Communication speed options */
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typedef enum e_i2c_master_rate
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{
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I2C_MASTER_RATE_STANDARD = 100000, ///< 100 kHz
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I2C_MASTER_RATE_FAST = 400000, ///< 400 kHz
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I2C_MASTER_RATE_FASTPLUS = 1000000 ///< 1 MHz
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} i2c_master_rate_t;
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/** Addressing mode options */
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typedef enum e_i2c_master_addr_mode
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{
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I2C_MASTER_ADDR_MODE_7BIT = 1, ///< Use 7-bit addressing mode
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I2C_MASTER_ADDR_MODE_10BIT = 2, ///< Use 10-bit addressing mode
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} i2c_master_addr_mode_t;
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/** Callback events */
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typedef enum e_i2c_master_event
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{
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I2C_MASTER_EVENT_ABORTED = 1, ///< A transfer was aborted
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I2C_MASTER_EVENT_RX_COMPLETE = 2, ///< A receive operation was completed successfully
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I2C_MASTER_EVENT_TX_COMPLETE = 3 ///< A transmit operation was completed successfully
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} i2c_master_event_t;
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/** I2C callback parameter definition */
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typedef struct st_i2c_master_callback_args
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{
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void const * p_context; ///< Pointer to user-provided context
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i2c_master_event_t event; ///< Event code
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} i2c_master_callback_args_t;
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/** I2C status indicators */
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typedef struct st_i2c_master_status
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{
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bool open; ///< True if driver is open
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} i2c_master_status_t;
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/** I2C configuration block */
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typedef struct st_i2c_master_cfg
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{
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/** Generic configuration */
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uint8_t channel; ///< Identifier recognizable by implementation
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i2c_master_rate_t rate; ///< Device's maximum clock rate from enum i2c_rate_t
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uint32_t slave; ///< The address of the slave device
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i2c_master_addr_mode_t addr_mode; ///< Indicates how slave fields should be interpreted
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uint8_t ipl; ///< Interrupt priority level. Same for RXI, TXI, TEI and ERI.
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IRQn_Type rxi_irq; ///< Receive IRQ number
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IRQn_Type txi_irq; ///< Transmit IRQ number
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IRQn_Type tei_irq; ///< Transmit end IRQ number
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IRQn_Type eri_irq; ///< Error IRQ number
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/** DTC support */
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transfer_instance_t const * p_transfer_tx; ///< DTC instance for I2C transmit.Set to NULL if unused.
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transfer_instance_t const * p_transfer_rx; ///< DTC instance for I2C receive. Set to NULL if unused.
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/** Parameters to control software behavior */
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void (* p_callback)(i2c_master_callback_args_t * p_args); ///< Pointer to callback function
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void const * p_context; ///< Pointer to the user-provided context
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/** Implementation-specific configuration */
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void const * p_extend; ///< Any configuration data needed by the hardware
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} i2c_master_cfg_t;
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/** I2C control block. Allocate an instance specific control block to pass into the I2C API calls.
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* @par Implemented as
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* - iic_master_instance_ctrl_t
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*/
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typedef void i2c_master_ctrl_t;
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/** Interface definition for I2C access as master */
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typedef struct st_i2c_master_api
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{
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/** Opens the I2C Master driver and initializes the hardware.
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* @par Implemented as
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* - @ref R_RIIC_MASTER_Open()
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*
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* @param[in] p_ctrl Pointer to control block. Must be declared by user. Elements are set here.
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* @param[in] p_cfg Pointer to configuration structure.
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*/
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fsp_err_t (* open)(i2c_master_ctrl_t * const p_ctrl, i2c_master_cfg_t const * const p_cfg);
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/** Performs a read operation on an I2C Master device.
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* @par Implemented as
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* - @ref R_RIIC_MASTER_Read()
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*
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* @param[in] p_ctrl Pointer to control block set in i2c_api_master_t::open call.
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* @param[in] p_dest Pointer to the location to store read data.
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* @param[in] bytes Number of bytes to read.
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* @param[in] restart Specify if the restart condition should be issued after reading.
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*/
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fsp_err_t (* read)(i2c_master_ctrl_t * const p_ctrl, uint8_t * const p_dest, uint32_t const bytes,
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bool const restart);
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/** Performs a write operation on an I2C Master device.
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* @par Implemented as
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* - @ref R_RIIC_MASTER_Write()
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*
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* @param[in] p_ctrl Pointer to control block set in i2c_api_master_t::open call.
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* @param[in] p_src Pointer to the location to get write data from.
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* @param[in] bytes Number of bytes to write.
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* @param[in] restart Specify if the restart condition should be issued after writing.
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*/
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fsp_err_t (* write)(i2c_master_ctrl_t * const p_ctrl, uint8_t * const p_src, uint32_t const bytes,
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bool const restart);
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/** Performs a reset of the peripheral.
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* @par Implemented as
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* - @ref R_RIIC_MASTER_Abort()
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*
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* @param[in] p_ctrl Pointer to control block set in i2c_api_master_t::open call.
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*/
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fsp_err_t (* abort)(i2c_master_ctrl_t * const p_ctrl);
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/** Sets address of the slave device without reconfiguring the bus.
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* @par Implemented as
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* - @ref R_RIIC_MASTER_SlaveAddressSet()
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*
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* @param[in] p_ctrl Pointer to control block set in i2c_api_master_t::open call.
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* @param[in] slave_address Address of the slave device.
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* @param[in] address_mode Addressing mode.
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*/
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fsp_err_t (* slaveAddressSet)(i2c_master_ctrl_t * const p_ctrl, uint32_t const slave,
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i2c_master_addr_mode_t const addr_mode);
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/**
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* Specify callback function and optional context pointer and working memory pointer.
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* @par Implemented as
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* - @ref R_RIIC_MASTER_CallbackSet()
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*
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* @param[in] p_ctrl Pointer to the RIIC Master control block.
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* @param[in] p_callback Callback function
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* @param[in] p_context Pointer to send to callback function
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* @param[in] p_working_memory Pointer to volatile memory where callback structure can be allocated.
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* Callback arguments allocated here are only valid during the callback.
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*/
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fsp_err_t (* callbackSet)(i2c_master_ctrl_t * const p_api_ctrl, void (* p_callback)(i2c_master_callback_args_t *),
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void const * const p_context, i2c_master_callback_args_t * const p_callback_memory);
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/** Gets the status of the configured I2C device.
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* @par Implemented as
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* - @ref R_RIIC_MASTER_StatusGet()
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*
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* @param[in] p_ctrl Pointer to the RIIC Master control block.
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* @param[out] p_status Pointer to store current status.
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*/
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fsp_err_t (* statusGet)(i2c_master_ctrl_t * const p_api_ctrl, i2c_master_status_t * p_status);
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/** Closes the driver and releases the I2C Master device.
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* @par Implemented as
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* - @ref R_RIIC_MASTER_Close()
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*
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* @param[in] p_ctrl Pointer to control block set in i2c_api_master_t::open call.
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*/
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fsp_err_t (* close)(i2c_master_ctrl_t * const p_ctrl);
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} i2c_master_api_t;
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/** This structure encompasses everything that is needed to use an instance of this interface. */
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typedef struct st_i2c_master_instance
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{
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i2c_master_ctrl_t * p_ctrl; ///< Pointer to the control structure for this instance
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i2c_master_cfg_t const * p_cfg; ///< Pointer to the configuration structure for this instance
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i2c_master_api_t const * p_api; ///< Pointer to the API structure for this instance
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} i2c_master_instance_t;
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/******************************************************************************************************************//**
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* @} (end addtogroup I2C_MASTER_API)
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*********************************************************************************************************************/
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/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
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FSP_FOOTER
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#endif

‎drivers/rz/fsp/inc/instances/rzg/r_riic_master.h

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/*
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* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*******************************************************************************************************************//**
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* @addtogroup RIIC_MASTER
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* @{
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**********************************************************************************************************************/
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#ifndef R_RIIC_MASTER_H
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#define R_RIIC_MASTER_H
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#include "bsp_api.h"
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#include "r_riic_master_cfg.h"
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#include "r_i2c_master_api.h"
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/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
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FSP_HEADER
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/***********************************************************************************************************************
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* Macro definitions
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**********************************************************************************************************************/
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/***********************************************************************************************************************
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* Typedef definitions
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**********************************************************************************************************************/
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/** I2C Timeout mode parameter definition */
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typedef enum e_iic_master_timeout_mode
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{
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IIC_MASTER_TIMEOUT_MODE_LONG = 0, ///< Timeout Detection Time Select: Long Mode -> TMOS = 0
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IIC_MASTER_TIMEOUT_MODE_SHORT = 1 ///< Timeout Detection Time Select: Short Mode -> TMOS = 1
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} iic_master_timeout_mode_t;
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typedef enum e_iic_master_timeout_scl_low
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{
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IIC_MASTER_TIMEOUT_SCL_LOW_DISABLED = 0, ///< Timeout detection during SCL low disabled
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IIC_MASTER_TIMEOUT_SCL_LOW_ENABLED = 1 ///< Timeout detection during SCL low enabled
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} iic_master_timeout_scl_low_t;
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/** I2C clock settings */
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typedef struct iic_master_clock_settings
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{
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uint8_t cks_value; ///< Internal Reference Clock Select
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uint8_t brh_value; ///< High-level period of SCL clock
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uint8_t brl_value; ///< Low-level period of SCL clock
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} iic_master_clock_settings_t;
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/** I2C control structure. DO NOT INITIALIZE. */
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typedef struct st_iic_master_instance_ctrl
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{
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i2c_master_cfg_t const * p_cfg; // Pointer to the configuration structure
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uint32_t slave; // The address of the slave device
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i2c_master_addr_mode_t addr_mode; // Indicates how slave fields should be interpreted
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uint32_t open; // Flag to determine if the device is open
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R_RIIC0_Type * p_reg; // Base register for this channel
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/* Current transfer information. */
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uint8_t * p_buff; // Holds the data associated with the transfer
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uint32_t total; // Holds the total number of data bytes to transfer
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uint32_t remain; // Tracks the remaining data bytes to transfer
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uint32_t loaded; // Tracks the number of data bytes written to the register
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uint8_t addr_low; // Holds the last address byte to issue
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uint8_t addr_high; // Holds the first address byte to issue in 10-bit mode
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uint8_t addr_total; // Holds the total number of address bytes to transfer
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uint8_t addr_remain; // Tracks the remaining address bytes to transfer
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uint8_t addr_loaded; // Tracks the number of address bytes written to the register
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volatile bool read; // Holds the direction of the data byte transfer
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volatile bool restart; // Holds whether or not the restart should be issued when done
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volatile bool err; // Tracks whether or not an error occurred during processing
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volatile bool restarted; // Tracks whether or not a restart was issued during the previous transfer
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volatile bool dummy_read_completed; // Tracks whether the dummy read is performed
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volatile bool activation_on_rxi; // Tracks whether the transfer is activated on RXI interrupt
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volatile bool activation_on_txi; // Tracks whether the transfer is activated on TXI interrupt
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volatile bool address_restarted; // Tracks whether the restart condition is send on 10 bit read
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volatile bool nack_before_stop; // Tracks whether or not a reception of NACK before Stop condition detect
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/* Pointer to callback and optional working memory */
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void (* p_callback)(i2c_master_callback_args_t *);
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i2c_master_callback_args_t * p_callback_memory;
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/* Pointer to context to be passed into callback function */
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void const * p_context;
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} iic_master_instance_ctrl_t;
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/** RIIC extended configuration */
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typedef struct st_riic_master_extended_cfg
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{
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iic_master_timeout_mode_t timeout_mode; ///< Timeout Detection Time Select: Long Mode = 0 and Short Mode = 1.
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iic_master_timeout_scl_low_t timeout_scl_low; ///< Allows timeouts to occur when SCL is held low.
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iic_master_clock_settings_t clock_settings; ///< I2C Clock settings
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uint8_t noise_filter_stage; ///< Noise Filter Stage Selection
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IRQn_Type naki_irq; ///< NACK IRQ Number
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IRQn_Type sti_irq; ///< Start condition IRQ Number
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IRQn_Type spi_irq; ///< Stop condition IRQ Number
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IRQn_Type ali_irq; ///< Arbitration lost IRQ Number
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IRQn_Type tmoi_irq; ///< Timeout IRQ Number
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} riic_master_extended_cfg_t;
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/**********************************************************************************************************************
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* Exported global variables
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**********************************************************************************************************************/
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/** @cond INC_HEADER_DEFS_SEC */
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/** Filled in Interface API structure for this Instance. */
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extern i2c_master_api_t const g_i2c_master_on_iic;
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/** @endcond */
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/***********************************************************************************************************************
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* Public APIs
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**********************************************************************************************************************/
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fsp_err_t R_RIIC_MASTER_Open(i2c_master_ctrl_t * const p_api_ctrl, i2c_master_cfg_t const * const p_cfg);
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fsp_err_t R_RIIC_MASTER_Read(i2c_master_ctrl_t * const p_api_ctrl,
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uint8_t * const p_dest,
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uint32_t const bytes,
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bool const restart);
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fsp_err_t R_RIIC_MASTER_Write(i2c_master_ctrl_t * const p_api_ctrl,
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uint8_t * const p_src,
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uint32_t const bytes,
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bool const restart);
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fsp_err_t R_RIIC_MASTER_Abort(i2c_master_ctrl_t * const p_api_ctrl);
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fsp_err_t R_RIIC_MASTER_SlaveAddressSet(i2c_master_ctrl_t * const p_api_ctrl,
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uint32_t const slave,
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i2c_master_addr_mode_t const addr_mode);
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fsp_err_t R_RIIC_MASTER_Close(i2c_master_ctrl_t * const p_api_ctrl);
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fsp_err_t R_RIIC_MASTER_CallbackSet(i2c_master_ctrl_t * const p_api_ctrl,
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void ( * p_callback)(i2c_master_callback_args_t *),
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void const * const p_context,
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i2c_master_callback_args_t * const p_callback_memory);
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fsp_err_t R_RIIC_MASTER_StatusGet(i2c_master_ctrl_t * const p_api_ctrl, i2c_master_status_t * p_status);
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/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
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FSP_FOOTER
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#endif // R_RIIC_MASTER_H
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/*******************************************************************************************************************//**
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* @} (end defgroup RIIC_MASTER)
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**********************************************************************************************************************/

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