hal: renesas: Keep a backport for UCK, OCTA, U60CK clock marcro

Keep a backport for UCK, OCTA, U60CK clock marcro, due to it will
be remove in next FSP version.

Signed-off-by: Khoa Nguyen <[email protected]>

Author: khoa-nguyen-18

drivers/ra/README

@@ -138,3 +138,8 @@ Patch List:
          drivers/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA8M1AH.h
          drivers/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA8D1BH.h
          drivers/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA8T1AH.h
+
+   * Keep a backport for UCK, OCTA, U60CK clock marcro in bsp_clocks.c
+      Impacted files:
+         drivers/ra/fsp/src/bsp/mcu/all/bsp_clocks.c
+      Note: This will be remove in next FSP version

drivers/ra/fsp/src/bsp/mcu/all/bsp_clocks.c

@@ -127,6 +127,22 @@
 #define BSP_PRV_PERIPHERAL_CLK_RDY_BIT_POS      (7U)
 #define BSP_PRV_PERIPHERAL_CLK_RDY_BIT_MASK     (1U << BSP_PRV_PERIPHERAL_CLK_RDY_BIT_POS)
 
+/* Prepare for migrate */
+#if !BSP_MCU_GROUP_RA8P1
+  #ifdef BSP_CFG_UCK_DIV
+    #define BSP_CFG_UCLK_SOURCE BSP_CFG_UCK_SOURCE
+    #define BSP_CFG_UCLK_DIV BSP_CFG_UCK_DIV
+  #endif
+  #if BSP_FEATURE_BSP_HAS_OCTASPI_CLOCK
+    #define BSP_CFG_OCTACLK_SOURCE BSP_CFG_OCTA_SOURCE
+    #define BSP_CFG_OCTACLK_DIV BSP_CFG_OCTA_DIV
+  #endif
+  #if BSP_FEATURE_BSP_HAS_USB60_CLOCK
+    #define BSP_CFG_USB60CLK_SOURCE BSP_CFG_U60CK_SOURCE
+    #define BSP_CFG_USB60CLK_DIV BSP_CFG_U60CK_DIV
+  #endif
+#endif
+
 #ifdef BSP_CFG_UCLK_DIV
 
 /* If the MCU has SCKDIVCR2 for USBCK configuration. */
@@ -634,7 +650,7 @@
 #endif
 
 #if defined(BSP_CFG_OPTION_SETTING_OFS1_ICSATS) && BSP_FEATURE_BSP_HAS_CLOCK_SUPPLY_TYPEB
- #define BSP_PRV_CLOCK_SUPPLY_TYPE_B              (0 == BSP_CFG_OPTION_SETTING_OFS1_ICSATS)
+ #define BSP_PRV_CLOCK_SUPPLY_TYPE_B              (0 == BSP_CFG_ROM_REG_OFS1_ICSATS)
 #else
  #define BSP_PRV_CLOCK_SUPPLY_TYPE_B              (0)
 #endif