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lines changed Original file line number Diff line number Diff line change 1- /* generated configuration header file - do not edit */
1+ /*
2+ * Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
3+ *
4+ * SPDX-License-Identifier: BSD-3-Clause
5+ */
6+
27#ifndef R_SCI_UART_CFG_H_
38#define R_SCI_UART_CFG_H_
4- #ifdef __cplusplus
5- extern "C" {
9+ #ifdef __cplusplus
10+ extern "C" {
611 #endif
712
813#define SCI_UART_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
9- #define SCI_UART_CFG_FIFO_SUPPORT (0 )
10- #define SCI_UART_CFG_DTC_SUPPORTED (0 )
14+ #define SCI_UART_CFG_FIFO_SUPPORT (CONFIG_UART_RA_SCI_UART_FIFO_ENABLE )
15+ #define SCI_UART_CFG_DTC_SUPPORTED (CONFIG_USE_RA_FSP_DTC )
1116#define SCI_UART_CFG_FLOW_CONTROL_SUPPORT (0)
1217#define SCI_UART_CFG_RS485_SUPPORT (0)
1318
14- #ifdef __cplusplus
15- }
19+ #ifdef __cplusplus
20+ }
1621 #endif
1722#endif /* R_SCI_UART_CFG_H_ */
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