Skip to content

Commit 6ef17e9

Browse files
Hieu NguyenKhiemNguyenT
Hieu Nguyen
authored and
KhiemNguyenT
committed
hal: renesas: rz: Add initial support for RZ/V
This is the initial hal support for RZ/V series. The hal layer support for RZ/V will based on RZ/V FSP Signed-off-by: Hieu Nguyen <[email protected]> Signed-off-by: Nhut Nguyen <[email protected]>
1 parent b7525fd commit 6ef17e9

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

80 files changed

+43886
-0
lines changed

‎drivers/rz/CMakeLists.txt

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,18 @@ set(include_dirs
1414
fsp/src/${SOC_SERIES_PREFIX}/bsp/mcu/${CONFIG_SOC_SERIES}
1515
)
1616

17+
if(CONFIG_CPU_CORTEX_M)
18+
set(CPU cm)
19+
elseif(CONFIG_CPU_CORTEX_R)
20+
set(CPU cr)
21+
elseif(CONFIG_CPU_CORTEX_A)
22+
set(CPU ca)
23+
endif()
24+
25+
if(IS_DIRECTORY "${CMAKE_CURRENT_SOURCE_DIR}/fsp/src/${SOC_SERIES_PREFIX}/bsp/mcu/all/${CPU}")
26+
list(APPEND include_dirs "fsp/src/${SOC_SERIES_PREFIX}/bsp/mcu/all/${CPU}")
27+
endif()
28+
1729
zephyr_include_directories(${include_dirs})
1830

1931
# Optional build base on feature configuration

‎drivers/rz/README

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5,12 +5,14 @@ Origin:
55
Renesas Electronics Corporation
66
RZ/A: https://github.com/renesas/rza-fsp
77
RZ/G: https://github.com/renesas/rzg-fsp
8+
RZ/V: https://github.com/renesas/rzv-fsp
89
RZ/N: https://github.com/renesas/rzn-fsp
910
RZ/T: https://github.com/renesas/rzt-fsp
1011

1112
Status:
1213
RZ/A FSP: version v3.3.0
1314
RZ/G FSP: version v2.1.0
15+
RZ/V FSP: version v3.0.0
1416
RZ/N FSP: version v2.1.0
1517
RZ/T FSP: version v2.2.0
1618

@@ -31,12 +33,16 @@ URL:
3133
https://github.com/renesas/rzg-fsp
3234
Commit: 8db06f881784144e86361b1266ac4d3c026f6ad8
3335

36+
https://github.com/renesas/rzv-fsp
37+
Commit: dbc49dea2a0fe4b2cc7c7f1de40a6f6aadf4b980
38+
3439
https://github.com/renesas/rzn-fsp
3540
Commit: dcdc687a97844038f909186c938aab98c056175d
3641

3742
https://github.com/renesas/rzt-fsp
3843
Commit: e66ab13216949c9ce5a09555171c422d5a323f1b
3944

45+
4046
Maintained-by:
4147
Renesas Electronics Corporation
4248

‎drivers/rz/fsp/inc/instances/rzv/fsp_common_api.h

Lines changed: 380 additions & 0 deletions
Large diffs are not rendered by default.

‎drivers/rz/fsp/inc/instances/rzv/fsp_version.h

Lines changed: 76 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,76 @@
1+
/*
2+
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
3+
*
4+
* SPDX-License-Identifier: BSD-3-Clause
5+
*/
6+
7+
#ifndef FSP_VERSION_H
8+
#define FSP_VERSION_H
9+
10+
/***********************************************************************************************************************
11+
* Includes
12+
**********************************************************************************************************************/
13+
14+
/* Includes board and MCU related header files. */
15+
#include "bsp_api.h"
16+
17+
/*******************************************************************************************************************//**
18+
* @addtogroup RENESAS_COMMON
19+
* @{
20+
**********************************************************************************************************************/
21+
22+
#ifdef __cplusplus
23+
extern "C" {
24+
#endif
25+
26+
/**********************************************************************************************************************
27+
* Macro definitions
28+
**********************************************************************************************************************/
29+
30+
/** FSP pack major version. */
31+
#define FSP_VERSION_MAJOR (3U)
32+
33+
/** FSP pack minor version. */
34+
#define FSP_VERSION_MINOR (0U)
35+
36+
/** FSP pack patch version. */
37+
#define FSP_VERSION_PATCH (0U)
38+
39+
/** FSP pack version build number (currently unused). */
40+
#define FSP_VERSION_BUILD (0U)
41+
42+
/** Public FSP version name. */
43+
#define FSP_VERSION_STRING ("3.0.0")
44+
45+
/** Unique FSP version ID. */
46+
#define FSP_VERSION_BUILD_STRING ("Built with RZ/V Flexible Software Package version 3.0.0")
47+
48+
/**********************************************************************************************************************
49+
* Typedef definitions
50+
**********************************************************************************************************************/
51+
52+
/** FSP Pack version structure */
53+
typedef union st_fsp_pack_version
54+
{
55+
/** Version id */
56+
uint32_t version_id;
57+
58+
/**
59+
* Code version parameters, little endian order.
60+
*/
61+
struct version_id_b_s
62+
{
63+
uint8_t build; ///< Build version of FSP Pack
64+
uint8_t patch; ///< Patch version of FSP Pack
65+
uint8_t minor; ///< Minor version of FSP Pack
66+
uint8_t major; ///< Major version of FSP Pack
67+
} version_id_b;
68+
} fsp_pack_version_t;
69+
70+
/** @} */
71+
72+
#ifdef __cplusplus
73+
}
74+
#endif
75+
76+
#endif

‎drivers/rz/fsp/src/rzv/CMakeLists.txt

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,11 @@
1+
# SPDX-License-Identifier: Apache-2.0
2+
3+
set(srcs
4+
bsp/mcu/all/bsp_address_convert.c
5+
bsp/mcu/all/bsp_clocks.c
6+
bsp/mcu/all/bsp_delay.c
7+
bsp/mcu/all/bsp_io.c
8+
bsp/mcu/all/cm/bsp_irq.c
9+
)
10+
11+
zephyr_library_sources(${srcs})

‎drivers/rz/fsp/src/rzv/bsp/cmsis/Device/RENESAS/Include/R9A07G054L.h

Lines changed: 143 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,143 @@
1+
/*
2+
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
3+
*
4+
* SPDX-License-Identifier: BSD-3-Clause
5+
*/
6+
7+
/*
8+
* @file R9A07G054L.h
9+
* @brief CMSIS HeaderFile
10+
*/
11+
12+
/** @addtogroup Renesas
13+
* @{
14+
*/
15+
16+
/** @addtogroup R9A07G054L
17+
* @{
18+
*/
19+
20+
#ifndef R9A07G054L_H
21+
#define R9A07G054L_H
22+
23+
#ifdef __cplusplus
24+
extern "C" {
25+
#endif
26+
27+
/** @addtogroup Configuration_of_CMSIS
28+
* @{
29+
*/
30+
31+
/* =========================================================================================================================== */
32+
/* ================ Interrupt Number Definition ================ */
33+
/* =========================================================================================================================== */
34+
35+
/* =========================================================================================================================== */
36+
/* ================ Processor and Core Peripheral Section ================ */
37+
/* =========================================================================================================================== */
38+
39+
/* ========================== Configuration of the ARM Cortex-M33 Processor and Core Peripherals =========================== */
40+
#define __CM33_REV 0x0004U /*!< CM33 Core Revision */
41+
#define __NVIC_PRIO_BITS 7 /*!< Number of Bits used for Priority Levels */
42+
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
43+
#define __VTOR_PRESENT 1 /*!< Set to 1 if CPU supports Vector Table Offset Register */
44+
#define __MPU_PRESENT 1 /*!< MPU present */
45+
#define __FPU_PRESENT 0 /*!< FPU present */
46+
#define __FPU_DP 0 /*!< Double Precision FPU */
47+
#define __DSP_PRESENT 0 /*!< DSP extension present */
48+
#define __SAUREGION_PRESENT 0 /*!< SAU region present */
49+
50+
/** @} */ /* End of group Configuration_of_CMSIS */
51+
52+
#include "core_cm33.h" /*!< ARM Cortex-M33 processor and core peripherals */
53+
#include "system.h" /*!< R9A07G054L System */
54+
55+
#ifndef __IM /*!< Fallback for older CMSIS versions */
56+
#define __IM __I
57+
#endif
58+
#ifndef __OM /*!< Fallback for older CMSIS versions */
59+
#define __OM __O
60+
#endif
61+
#ifndef __IOM /*!< Fallback for older CMSIS versions */
62+
#define __IOM __IO
63+
#endif
64+
65+
/* ======================================== Start of section using anonymous unions ======================================== */
66+
#if defined(__CC_ARM)
67+
#pragma push
68+
#pragma anon_unions
69+
#elif defined(__ICCARM__)
70+
#pragma language=extended
71+
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
72+
#pragma clang diagnostic push
73+
#pragma clang diagnostic ignored "-Wc11-extensions"
74+
#pragma clang diagnostic ignored "-Wreserved-id-macro"
75+
#pragma clang diagnostic ignored "-Wgnu-anonymous-struct"
76+
#pragma clang diagnostic ignored "-Wnested-anon-types"
77+
#elif defined(__GNUC__)
78+
79+
/* anonymous unions are enabled by default */
80+
#elif defined(__TMS470__)
81+
82+
/* anonymous unions are enabled by default */
83+
#elif defined(__TASKING__)
84+
#pragma warning 586
85+
#elif defined(__CSMC__)
86+
87+
/* anonymous unions are enabled by default */
88+
#else
89+
#warning Not supported compiler type
90+
#endif
91+
92+
/* =========================================================================================================================== */
93+
/* ================ Device Specific Cluster Section ================ */
94+
/* =========================================================================================================================== */
95+
96+
/** @addtogroup Device_Peripheral_clusters
97+
* @{
98+
*/
99+
#include "R9A07G054L/iodefine.h"
100+
101+
/** @} */ /* End of group Device_Peripheral_clusters */
102+
103+
/* ========================================= End of section using anonymous unions =============================== */
104+
#if defined(__CC_ARM)
105+
#pragma pop
106+
#elif defined(__ICCARM__)
107+
108+
/* leave anonymous unions enabled */
109+
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
110+
#pragma clang diagnostic pop
111+
#elif defined(__GNUC__)
112+
113+
/* anonymous unions are enabled by default */
114+
#elif defined(__TMS470__)
115+
116+
/* anonymous unions are enabled by default */
117+
#elif defined(__TASKING__)
118+
#pragma warning restore
119+
#elif defined(__CSMC__)
120+
121+
/* anonymous unions are enabled by default */
122+
#endif
123+
124+
/* =========================================================================================================================== */
125+
/* ================ Pos/Mask Cluster Section ================ */
126+
/* =========================================================================================================================== */
127+
128+
/** @addtogroup PosMask_clusters
129+
* @{
130+
*/
131+
#include "R9A07G054L/iobitmask.h"
132+
133+
/** @} */ /* End of group PosMask_clusters */
134+
135+
#ifdef __cplusplus
136+
}
137+
#endif
138+
139+
#endif /* R9A07G054L_H */
140+
141+
/** @} */ /* End of group R9A07G054L */
142+
143+
/** @} */ /* End of group Renesas */

‎drivers/rz/fsp/src/rzv/bsp/cmsis/Device/RENESAS/Include/R9A07G054L/iobitmask.h

Lines changed: 35 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,35 @@
1+
/*
2+
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
3+
*
4+
* SPDX-License-Identifier: BSD-3-Clause
5+
*/
6+
7+
/**********************************************************************************************************************
8+
* File Name : iobitmask.h
9+
* Version : 1.00
10+
* Description : iobitmask header
11+
*********************************************************************************************************************/
12+
13+
#ifndef __IOBITMASK_HEADER__
14+
#define __IOBITMASK_HEADER__
15+
16+
#include "iobitmasks/adc_c_iobitmask.h"
17+
#include "iobitmasks/cpg_iobitmask.h"
18+
#include "iobitmasks/canfd_iobitmask.h"
19+
#include "iobitmasks/dmac_b_iobitmask.h"
20+
#include "iobitmasks/gpio_iobitmask.h"
21+
#include "iobitmasks/gpt_iobitmask.h"
22+
#include "iobitmasks/gtm_iobitmask.h"
23+
#include "iobitmasks/intc_im33_iobitmask.h"
24+
#include "iobitmasks/mhu_iobitmask.h"
25+
#include "iobitmasks/poeg_iobitmask.h"
26+
#include "iobitmasks/riic_iobitmask.h"
27+
#include "iobitmasks/rspi_iobitmask.h"
28+
#include "iobitmasks/scifa_iobitmask.h"
29+
#include "iobitmasks/spibsc_iobitmask.h"
30+
#include "iobitmasks/ssi_iobitmask.h"
31+
#include "iobitmasks/sysc_iobitmask.h"
32+
#include "iobitmasks/wdt_iobitmask.h"
33+
#include "iobitmasks/mtu_iobitmask.h"
34+
35+
#endif /* __IOBITMASK_HEADER__ */

0 commit comments

Comments
 (0)