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Phuc Phamnhutnguyenkc
Phuc Pham
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nhutnguyenkc
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hal: renesas: rzt: Add I2C support for RZ/T series
Add HAL FSP I2C files for RZ/T series Signed-off-by: Phuc Pham <[email protected]> Signed-off-by: Nhut Nguyen <[email protected]>
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‎drivers/rz/CMakeLists.txt

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@@ -48,6 +48,9 @@ zephyr_library_sources_ifdef(CONFIG_USE_RZ_FSP_MHU
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zephyr_library_sources_ifdef(CONFIG_USE_RZ_FSP_RIIC_MASTER
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fsp/src/${SOC_SERIES_PREFIX}/r_riic_master/r_riic_master.c)
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zephyr_library_sources_ifdef(CONFIG_USE_RZ_FSP_IIC_MASTER
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fsp/src/${SOC_SERIES_PREFIX}/r_iic_master/r_iic_master.c)
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zephyr_library_sources_ifdef(CONFIG_USE_RZ_FSP_GTM
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fsp/src/${SOC_SERIES_PREFIX}/r_gtm/r_gtm.c)
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‎drivers/rz/fsp/inc/instances/rzt/r_iic_master.h

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/*
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* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*******************************************************************************************************************//**
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* @addtogroup IIC_MASTER
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* @{
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**********************************************************************************************************************/
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#ifndef R_IIC_MASTER_H
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#define R_IIC_MASTER_H
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#include "bsp_api.h"
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#include "r_iic_master_cfg.h"
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#include "r_i2c_master_api.h"
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/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
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FSP_HEADER
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/***********************************************************************************************************************
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* Macro definitions
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**********************************************************************************************************************/
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/***********************************************************************************************************************
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* Typedef definitions
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**********************************************************************************************************************/
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/** I2C Timeout mode parameter definition */
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typedef enum e_iic_master_timeout_mode
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{
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IIC_MASTER_TIMEOUT_MODE_LONG = 0, ///< Timeout Detection Time Select: Long Mode -> TMOS = 0
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IIC_MASTER_TIMEOUT_MODE_SHORT = 1 ///< Timeout Detection Time Select: Short Mode -> TMOS = 1
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} iic_master_timeout_mode_t;
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typedef enum e_iic_master_timeout_scl_low
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{
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IIC_MASTER_TIMEOUT_SCL_LOW_DISABLED = 0, ///< Timeout detection during SCL low disabled
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IIC_MASTER_TIMEOUT_SCL_LOW_ENABLED = 1 ///< Timeout detection during SCL low enabled
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} iic_master_timeout_scl_low_t;
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/** I2C clock settings */
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typedef struct iic_master_clock_settings
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{
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uint8_t cks_value; ///< Internal Reference Clock Select
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uint8_t brh_value; ///< High-level period of SCL clock
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uint8_t brl_value; ///< Low-level period of SCL clock
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} iic_master_clock_settings_t;
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/** I2C control structure. DO NOT INITIALIZE. */
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typedef struct st_iic_master_instance_ctrl
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{
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i2c_master_cfg_t const * p_cfg; ///< Pointer to the configuration structure
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uint32_t slave; ///< The address of the slave device
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i2c_master_addr_mode_t addr_mode; ///< Indicates how slave fields should be interpreted
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uint32_t open; ///< Flag to determine if the device is open
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R_IIC0_Type * p_reg; ///< Base register for this channel
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/* Current transfer information. */
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uint8_t * p_buff; ///< Holds the data associated with the transfer
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uint32_t total; ///< Holds the total number of data bytes to transfer
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uint32_t remain; ///< Tracks the remaining data bytes to transfer
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uint32_t loaded; ///< Tracks the number of data bytes written to the register
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uint8_t addr_low; ///< Holds the last address byte to issue
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uint8_t addr_high; ///< Holds the first address byte to issue in 10-bit mode
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uint8_t addr_total; ///< Holds the total number of address bytes to transfer
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uint8_t addr_remain; ///< Tracks the remaining address bytes to transfer
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uint8_t addr_loaded; ///< Tracks the number of address bytes written to the register
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volatile bool read; ///< Holds the direction of the data byte transfer
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volatile bool restart; ///< Holds whether or not the restart should be issued when done
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volatile bool err; ///< Tracks whether or not an error occurred during processing
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volatile bool restarted; ///< Tracks whether or not a restart was issued during the previous transfer
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volatile bool dummy_read_completed; ///< Tracks whether the dummy read is performed
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volatile bool activation_on_rxi; ///< Tracks whether the transfer is activated on RXI interrupt
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volatile bool activation_on_txi; ///< Tracks whether the transfer is activated on TXI interrupt
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volatile bool address_restarted; ///< Tracks whether the restart condition is send on 10 bit read
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/* Pointer to callback and optional working memory */
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void (* p_callback)(i2c_master_callback_args_t *);
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i2c_master_callback_args_t * p_callback_memory;
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/* Pointer to context to be passed into callback function */
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void const * p_context;
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} iic_master_instance_ctrl_t;
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/** R_IIC extended configuration */
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typedef struct st_iic_master_extended_cfg
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{
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iic_master_timeout_mode_t timeout_mode; ///< Timeout Detection Time Select: Long Mode = 0 and Short Mode = 1.
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iic_master_timeout_scl_low_t timeout_scl_low; ///< Allows timeouts to occur when SCL is held low.
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iic_master_clock_settings_t clock_settings; ///< I2C Clock settings
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} iic_master_extended_cfg_t;
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/**********************************************************************************************************************
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* Exported global variables
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**********************************************************************************************************************/
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/** @cond INC_HEADER_DEFS_SEC */
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/** Filled in Interface API structure for this Instance. */
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extern i2c_master_api_t const g_i2c_master_on_iic;
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/** @endcond */
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/***********************************************************************************************************************
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* Public APIs
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**********************************************************************************************************************/
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fsp_err_t R_IIC_MASTER_Open(i2c_master_ctrl_t * const p_ctrl, i2c_master_cfg_t const * const p_cfg);
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fsp_err_t R_IIC_MASTER_Read(i2c_master_ctrl_t * const p_ctrl,
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uint8_t * const p_dest,
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uint32_t const bytes,
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bool const restart);
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fsp_err_t R_IIC_MASTER_Write(i2c_master_ctrl_t * const p_ctrl,
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uint8_t * const p_src,
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uint32_t const bytes,
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bool const restart);
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fsp_err_t R_IIC_MASTER_Abort(i2c_master_ctrl_t * const p_ctrl);
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fsp_err_t R_IIC_MASTER_SlaveAddressSet(i2c_master_ctrl_t * const p_ctrl,
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uint32_t const slave,
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i2c_master_addr_mode_t const addr_mode);
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fsp_err_t R_IIC_MASTER_Close(i2c_master_ctrl_t * const p_ctrl);
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fsp_err_t R_IIC_MASTER_CallbackSet(i2c_master_ctrl_t * const p_ctrl,
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void ( * p_callback)(i2c_master_callback_args_t *),
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void const * const p_context,
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i2c_master_callback_args_t * const p_callback_memory);
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fsp_err_t R_IIC_MASTER_StatusGet(i2c_master_ctrl_t * const p_ctrl, i2c_master_status_t * p_status);
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/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
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FSP_FOOTER
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#endif // R_IIC_MASTER_H
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/*******************************************************************************************************************//**
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* @} (end defgroup IIC_MASTER)
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**********************************************************************************************************************/

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