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hal: renesas: Add support for RA4E1
Add initial support for RA4E1 Signed-off-by: Khoa Nguyen <[email protected]>
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‎drivers/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4E10D.h

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‎drivers/ra/fsp/src/bsp/mcu/ra4e1/bsp_elc.h

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/*
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* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef BSP_ELC_H
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#define BSP_ELC_H
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/*******************************************************************************************************************//**
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* @addtogroup BSP_MCU_RA4E1
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* @{
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**********************************************************************************************************************/
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/***********************************************************************************************************************
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* Macro definitions
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**********************************************************************************************************************/
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/***********************************************************************************************************************
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* Typedef definitions
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**********************************************************************************************************************/
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/***********************************************************************************************************************
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* Exported global variables
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**********************************************************************************************************************/
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/***********************************************************************************************************************
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* Exported global functions (to be accessed by other files)
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**********************************************************************************************************************/
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/* UNCRUSTIFY-OFF */
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/** Sources of event signals to be linked to other peripherals or the CPU
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* @note This list is device specific.
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* */
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typedef enum e_elc_event_ra4e1
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{
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ELC_EVENT_NONE = (0x0), // Link disabled
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ELC_EVENT_ICU_IRQ0 = (0x001), // External pin interrupt 0
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ELC_EVENT_ICU_IRQ1 = (0x002), // External pin interrupt 1
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ELC_EVENT_ICU_IRQ2 = (0x003), // External pin interrupt 2
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ELC_EVENT_ICU_IRQ3 = (0x004), // External pin interrupt 3
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ELC_EVENT_ICU_IRQ4 = (0x005), // External pin interrupt 4
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ELC_EVENT_ICU_IRQ5 = (0x006), // External pin interrupt 5
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ELC_EVENT_ICU_IRQ6 = (0x007), // External pin interrupt 6
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ELC_EVENT_ICU_IRQ7 = (0x008), // External pin interrupt 7
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ELC_EVENT_ICU_IRQ8 = (0x009), // External pin interrupt 8
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ELC_EVENT_ICU_IRQ9 = (0x00A), // External pin interrupt 9
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ELC_EVENT_ICU_IRQ13 = (0x00E), // External pin interrupt 13
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ELC_EVENT_DMAC0_INT = (0x020), // DMAC0 transfer end
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ELC_EVENT_DMAC1_INT = (0x021), // DMAC1 transfer end
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ELC_EVENT_DMAC2_INT = (0x022), // DMAC2 transfer end
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ELC_EVENT_DMAC3_INT = (0x023), // DMAC3 transfer end
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ELC_EVENT_DMAC4_INT = (0x024), // DMAC4 transfer end
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ELC_EVENT_DMAC5_INT = (0x025), // DMAC5 transfer end
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ELC_EVENT_DMAC6_INT = (0x026), // DMAC6 transfer end
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ELC_EVENT_DMAC7_INT = (0x027), // DMAC7 transfer end
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ELC_EVENT_DTC_COMPLETE = (0x029), // DTC transfer complete
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ELC_EVENT_DTC_END = (0x02A), // DTC transfer end
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ELC_EVENT_DMA_TRANSERR = (0x02B), // DMA/DTC transfer error
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ELC_EVENT_ICU_SNOOZE_CANCEL = (0x02D), // Canceling from Snooze mode
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ELC_EVENT_FCU_FIFERR = (0x030), // Flash access error interrupt
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ELC_EVENT_FCU_FRDYI = (0x031), // Flash ready interrupt
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ELC_EVENT_LVD_LVD1 = (0x038), // Voltage monitor 1 interrupt
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ELC_EVENT_LVD_LVD2 = (0x039), // Voltage monitor 2 interrupt
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ELC_EVENT_CGC_MOSC_STOP = (0x03B), // Main Clock oscillation stop
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ELC_EVENT_LPM_SNOOZE_REQUEST = (0x03C), // Snooze entry
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ELC_EVENT_AGT0_INT = (0x040), // AGT interrupt
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ELC_EVENT_AGT0_COMPARE_A = (0x041), // Compare match A
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ELC_EVENT_AGT0_COMPARE_B = (0x042), // Compare match B
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ELC_EVENT_AGT1_INT = (0x043), // AGT interrupt
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ELC_EVENT_AGT1_COMPARE_A = (0x044), // Compare match A
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ELC_EVENT_AGT1_COMPARE_B = (0x045), // Compare match B
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ELC_EVENT_AGT2_INT = (0x046), // AGT interrupt
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ELC_EVENT_AGT2_COMPARE_A = (0x047), // Compare match A
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ELC_EVENT_AGT2_COMPARE_B = (0x048), // Compare match B
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ELC_EVENT_AGT3_INT = (0x049), // AGT interrupt
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ELC_EVENT_AGT3_COMPARE_A = (0x04A), // Compare match A
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ELC_EVENT_AGT3_COMPARE_B = (0x04B), // Compare match B
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ELC_EVENT_AGT5_INT = (0x04F), // AGT interrupt
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ELC_EVENT_AGT5_COMPARE_A = (0x050), // Compare match A
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ELC_EVENT_AGT5_COMPARE_B = (0x051), // Compare match B
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ELC_EVENT_IWDT_UNDERFLOW = (0x052), // IWDT underflow
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ELC_EVENT_WDT_UNDERFLOW = (0x053), // WDT0 underflow
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ELC_EVENT_RTC_ALARM = (0x054), // Alarm interrupt
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ELC_EVENT_RTC_PERIOD = (0x055), // Periodic interrupt
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ELC_EVENT_RTC_CARRY = (0x056), // Carry interrupt
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ELC_EVENT_USBFS_FIFO_0 = (0x06B), // DMA transfer request 0
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ELC_EVENT_USBFS_FIFO_1 = (0x06C), // DMA transfer request 1
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ELC_EVENT_USBFS_INT = (0x06D), // USBFS interrupt
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ELC_EVENT_USBFS_RESUME = (0x06E), // USBFS resume interrupt
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ELC_EVENT_IIC0_RXI = (0x073), // Receive data full
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ELC_EVENT_IIC0_TXI = (0x074), // Transmit data empty
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ELC_EVENT_IIC0_TEI = (0x075), // Transmit end
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ELC_EVENT_IIC0_ERI = (0x076), // Transfer error
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ELC_EVENT_IIC0_WUI = (0x077), // Wakeup interrupt
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ELC_EVENT_CAC_FREQUENCY_ERROR = (0x09E), // Frequency error interrupt
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ELC_EVENT_CAC_MEASUREMENT_END = (0x09F), // Measurement end interrupt
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ELC_EVENT_CAC_OVERFLOW = (0x0A0), // Overflow interrupt
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ELC_EVENT_CAN0_ERROR = (0x0A1), // Error interrupt
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ELC_EVENT_CAN0_FIFO_RX = (0x0A2), // Receive FIFO interrupt
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ELC_EVENT_CAN0_FIFO_TX = (0x0A3), // Transmit FIFO interrupt
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ELC_EVENT_CAN0_MAILBOX_RX = (0x0A4), // Reception complete interrupt
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ELC_EVENT_CAN0_MAILBOX_TX = (0x0A5), // Transmission complete interrupt
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ELC_EVENT_IOPORT_EVENT_1 = (0x0B1), // Port 1 event
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ELC_EVENT_IOPORT_EVENT_2 = (0x0B2), // Port 2 event
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ELC_EVENT_IOPORT_EVENT_3 = (0x0B3), // Port 3 event
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ELC_EVENT_IOPORT_EVENT_4 = (0x0B4), // Port 4 event
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ELC_EVENT_ELC_SOFTWARE_EVENT_0 = (0x0B5), // Software event 0
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ELC_EVENT_ELC_SOFTWARE_EVENT_1 = (0x0B6), // Software event 1
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ELC_EVENT_POEG0_EVENT = (0x0B7), // Port Output disable 0 interrupt
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ELC_EVENT_POEG1_EVENT = (0x0B8), // Port Output disable 1 interrupt
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ELC_EVENT_POEG2_EVENT = (0x0B9), // Port Output disable 2 interrupt
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ELC_EVENT_POEG3_EVENT = (0x0BA), // Port Output disable 3 interrupt
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ELC_EVENT_GPT1_CAPTURE_COMPARE_A = (0x0C9), // Capture/Compare match A
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ELC_EVENT_GPT1_CAPTURE_COMPARE_B = (0x0CA), // Capture/Compare match B
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ELC_EVENT_GPT1_COMPARE_C = (0x0CB), // Compare match C
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ELC_EVENT_GPT1_COMPARE_D = (0x0CC), // Compare match D
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ELC_EVENT_GPT1_COMPARE_E = (0x0CD), // Compare match E
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ELC_EVENT_GPT1_COMPARE_F = (0x0CE), // Compare match F
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ELC_EVENT_GPT1_COUNTER_OVERFLOW = (0x0CF), // Overflow
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ELC_EVENT_GPT1_COUNTER_UNDERFLOW = (0x0D0), // Underflow
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ELC_EVENT_GPT1_PC = (0x0D1), // Period count function finish
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ELC_EVENT_GPT2_CAPTURE_COMPARE_A = (0x0D2), // Capture/Compare match A
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ELC_EVENT_GPT2_CAPTURE_COMPARE_B = (0x0D3), // Capture/Compare match B
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ELC_EVENT_GPT2_COMPARE_C = (0x0D4), // Compare match C
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ELC_EVENT_GPT2_COMPARE_D = (0x0D5), // Compare match D
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ELC_EVENT_GPT2_COMPARE_E = (0x0D6), // Compare match E
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ELC_EVENT_GPT2_COMPARE_F = (0x0D7), // Compare match F
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ELC_EVENT_GPT2_COUNTER_OVERFLOW = (0x0D8), // Overflow
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ELC_EVENT_GPT2_COUNTER_UNDERFLOW = (0x0D9), // Underflow
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ELC_EVENT_GPT4_CAPTURE_COMPARE_A = (0x0E4), // Capture/Compare match A
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ELC_EVENT_GPT4_CAPTURE_COMPARE_B = (0x0E5), // Capture/Compare match B
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ELC_EVENT_GPT4_COMPARE_C = (0x0E6), // Compare match C
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ELC_EVENT_GPT4_COMPARE_D = (0x0E7), // Compare match D
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ELC_EVENT_GPT4_COMPARE_E = (0x0E8), // Compare match E
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ELC_EVENT_GPT4_COMPARE_F = (0x0E9), // Compare match F
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ELC_EVENT_GPT4_COUNTER_OVERFLOW = (0x0EA), // Overflow
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ELC_EVENT_GPT4_COUNTER_UNDERFLOW = (0x0EB), // Underflow
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ELC_EVENT_GPT4_PC = (0x0EC), // Period count function finish
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ELC_EVENT_GPT5_CAPTURE_COMPARE_A = (0x0ED), // Capture/Compare match A
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ELC_EVENT_GPT5_CAPTURE_COMPARE_B = (0x0EE), // Capture/Compare match B
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ELC_EVENT_GPT5_COMPARE_C = (0x0EF), // Compare match C
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ELC_EVENT_GPT5_COMPARE_D = (0x0F0), // Compare match D
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ELC_EVENT_GPT5_COMPARE_E = (0x0F1), // Compare match E
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ELC_EVENT_GPT5_COMPARE_F = (0x0F2), // Compare match F
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ELC_EVENT_GPT5_COUNTER_OVERFLOW = (0x0F3), // Overflow
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ELC_EVENT_GPT5_COUNTER_UNDERFLOW = (0x0F4), // Underflow
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ELC_EVENT_GPT5_PC = (0x0F5), // Period count function finish
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ELC_EVENT_ADC0_SCAN_END = (0x160), // End of A/D scanning operation
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ELC_EVENT_ADC0_SCAN_END_B = (0x161), // A/D scan end interrupt for group B
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ELC_EVENT_ADC0_WINDOW_A = (0x162), // Window A Compare match interrupt
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ELC_EVENT_ADC0_WINDOW_B = (0x163), // Window B Compare match interrupt
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ELC_EVENT_ADC0_COMPARE_MATCH = (0x164), // Compare match
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ELC_EVENT_ADC0_COMPARE_MISMATCH = (0x165), // Compare mismatch
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ELC_EVENT_SCI0_RXI = (0x180), // Receive data full
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ELC_EVENT_SCI0_TXI = (0x181), // Transmit data empty
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ELC_EVENT_SCI0_TEI = (0x182), // Transmit end
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ELC_EVENT_SCI0_ERI = (0x183), // Receive error
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ELC_EVENT_SCI0_AM = (0x184), // Address match event
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ELC_EVENT_SCI0_RXI_OR_ERI = (0x185), // Receive data full/Receive error
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ELC_EVENT_SCI3_RXI = (0x192), // Receive data full
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ELC_EVENT_SCI3_TXI = (0x193), // Transmit data empty
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ELC_EVENT_SCI3_TEI = (0x194), // Transmit end
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ELC_EVENT_SCI3_ERI = (0x195), // Receive error
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ELC_EVENT_SCI3_AM = (0x196), // Address match event
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ELC_EVENT_SCI4_RXI = (0x198), // Receive data full
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ELC_EVENT_SCI4_TXI = (0x199), // Transmit data empty
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ELC_EVENT_SCI4_TEI = (0x19A), // Transmit end
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ELC_EVENT_SCI4_ERI = (0x19B), // Receive error
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ELC_EVENT_SCI4_AM = (0x19C), // Address match event
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ELC_EVENT_SCI9_RXI = (0x1B6), // Receive data full
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ELC_EVENT_SCI9_TXI = (0x1B7), // Transmit data empty
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ELC_EVENT_SCI9_TEI = (0x1B8), // Transmit end
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ELC_EVENT_SCI9_ERI = (0x1B9), // Receive error
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ELC_EVENT_SCI9_AM = (0x1BA), // Address match event
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ELC_EVENT_SPI0_RXI = (0x1C4), // Receive buffer full
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ELC_EVENT_SPI0_TXI = (0x1C5), // Transmit buffer empty
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ELC_EVENT_SPI0_IDLE = (0x1C6), // Idle
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ELC_EVENT_SPI0_ERI = (0x1C7), // Error
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ELC_EVENT_SPI0_TEI = (0x1C8), // Transmission complete event
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ELC_EVENT_QSPI_INT = (0x1DA), // QSPI interrupt
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ELC_EVENT_DOC_INT = (0x1DB) // Data operation circuit interrupt
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} elc_event_t;
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#define BSP_PRV_VECT_ENUM(event,group) (ELC_ ## event)
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#define ELC_PERIPHERAL_NUM (18U)
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#define BSP_OVERRIDE_ELC_PERIPHERAL_T
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/** Possible peripherals to be linked to event signals
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* @note This list is device specific.
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* */
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typedef enum e_elc_peripheral
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{
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ELC_PERIPHERAL_GPT_A = (0),
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ELC_PERIPHERAL_GPT_B = (1),
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ELC_PERIPHERAL_GPT_C = (2),
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ELC_PERIPHERAL_GPT_D = (3),
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ELC_PERIPHERAL_GPT_E = (4),
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ELC_PERIPHERAL_GPT_F = (5),
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ELC_PERIPHERAL_GPT_G = (6),
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ELC_PERIPHERAL_GPT_H = (7),
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ELC_PERIPHERAL_ADC0 = (8),
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ELC_PERIPHERAL_ADC0_B = (9),
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ELC_PERIPHERAL_DAC0 = (12),
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ELC_PERIPHERAL_IOPORT1 = (14),
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ELC_PERIPHERAL_IOPORT2 = (15),
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ELC_PERIPHERAL_IOPORT3 = (16),
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ELC_PERIPHERAL_IOPORT4 = (17)
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} elc_peripheral_t;
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/** Positions of event link set registers (ELSRs) available on this MCU */
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#define BSP_ELC_PERIPHERAL_MASK (0x0003D3FFU)
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/* UNCRUSTIFY-ON */
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/** @} (end addtogroup BSP_MCU_RA4E1) */
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#endif

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