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| 1 | +/* |
| 2 | +* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates |
| 3 | +* |
| 4 | +* SPDX-License-Identifier: BSD-3-Clause |
| 5 | +*/ |
| 6 | + |
| 7 | +/*******************************************************************************************************************//** |
| 8 | + * @addtogroup OSPI_B |
| 9 | + * @{ |
| 10 | + **********************************************************************************************************************/ |
| 11 | + |
| 12 | +#ifndef R_OSPI_B_H |
| 13 | +#define R_OSPI_B_H |
| 14 | + |
| 15 | +/*********************************************************************************************************************** |
| 16 | + * Includes |
| 17 | + **********************************************************************************************************************/ |
| 18 | +#include "bsp_api.h" |
| 19 | +#include "r_ospi_b_cfg.h" |
| 20 | +#include "r_spi_flash_api.h" |
| 21 | + |
| 22 | +#if OSPI_B_CFG_DMAC_SUPPORT_ENABLE |
| 23 | + #include "r_transfer_api.h" |
| 24 | +#endif |
| 25 | + |
| 26 | +/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */ |
| 27 | +FSP_HEADER |
| 28 | + |
| 29 | +/*********************************************************************************************************************** |
| 30 | + * Macro definitions |
| 31 | + **********************************************************************************************************************/ |
| 32 | + |
| 33 | +/*********************************************************************************************************************** |
| 34 | + * Typedef definitions |
| 35 | + **********************************************************************************************************************/ |
| 36 | + |
| 37 | +/** OSPI Flash chip select */ |
| 38 | +typedef enum e_ospi_b_chip_select |
| 39 | +{ |
| 40 | + OSPI_B_DEVICE_NUMBER_0 = 0U, ///< Device connected to Chip-Select 0 |
| 41 | + OSPI_B_DEVICE_NUMBER_1, ///< Device connected to Chip-Select 1 |
| 42 | +} ospi_b_device_number_t; |
| 43 | + |
| 44 | +/** OSPI flash number of command code bytes. */ |
| 45 | +typedef enum e_ospi_b_command_bytes |
| 46 | +{ |
| 47 | + OSPI_B_COMMAND_BYTES_1 = 1U, ///< Command codes are 1 byte long. |
| 48 | + OSPI_B_COMMAND_BYTES_2 = 2U, ///< Command codes are 2 bytes long. |
| 49 | +} ospi_b_command_bytes_t; |
| 50 | + |
| 51 | +/** OSPI frame to frame interval */ |
| 52 | +typedef enum e_ospi_b_frame_interval_clocks |
| 53 | +{ |
| 54 | + OSPI_B_COMMAND_INTERVAL_CLOCKS_1 = 0U, ///< 1 interval clocks |
| 55 | + OSPI_B_COMMAND_INTERVAL_CLOCKS_2, ///< 2 interval clocks |
| 56 | + OSPI_B_COMMAND_INTERVAL_CLOCKS_3, ///< 3 interval clocks |
| 57 | + OSPI_B_COMMAND_INTERVAL_CLOCKS_4, ///< 4 interval clocks |
| 58 | + OSPI_B_COMMAND_INTERVAL_CLOCKS_5, ///< 5 interval clocks |
| 59 | + OSPI_B_COMMAND_INTERVAL_CLOCKS_6, ///< 6 interval clocks |
| 60 | + OSPI_B_COMMAND_INTERVAL_CLOCKS_7, ///< 7 interval clocks |
| 61 | + OSPI_B_COMMAND_INTERVAL_CLOCKS_8, ///< 8 interval clocks |
| 62 | + OSPI_B_COMMAND_INTERVAL_CLOCKS_9, ///< 9 interval clocks |
| 63 | + OSPI_B_COMMAND_INTERVAL_CLOCKS_10, ///< 10 interval clocks |
| 64 | + OSPI_B_COMMAND_INTERVAL_CLOCKS_11, ///< 11 interval clocks |
| 65 | + OSPI_B_COMMAND_INTERVAL_CLOCKS_12, ///< 12 interval clocks |
| 66 | + OSPI_B_COMMAND_INTERVAL_CLOCKS_13, ///< 13 interval clocks |
| 67 | + OSPI_B_COMMAND_INTERVAL_CLOCKS_14, ///< 14 interval clocks |
| 68 | + OSPI_B_COMMAND_INTERVAL_CLOCKS_15, ///< 15 interval clocks |
| 69 | + OSPI_B_COMMAND_INTERVAL_CLOCKS_16, ///< 16 interval clocks |
| 70 | +} ospi_b_command_interval_clocks_t; |
| 71 | + |
| 72 | +/** OSPI chip select de-assertion duration */ |
| 73 | +typedef enum e_ospi_b_cs_pullup_clocks |
| 74 | +{ |
| 75 | + OSPI_B_COMMAND_CS_PULLUP_CLOCKS_NO_EXTENSION = 0U, ///< CS asserting No extension |
| 76 | + OSPI_B_COMMAND_CS_PULLUP_CLOCKS_1, ///< CS asserting Extend 1 cycle |
| 77 | +} ospi_b_command_cs_pullup_clocks_t; |
| 78 | + |
| 79 | +/** OSPI chip select assertion duration */ |
| 80 | +typedef enum e_ospi_b_cs_pulldown_clocks |
| 81 | +{ |
| 82 | + OSPI_B_COMMAND_CS_PULLDOWN_CLOCKS_NO_EXTENSION = 0U, ///< CS negating No extension |
| 83 | + OSPI_B_COMMAND_CS_PULLDOWN_CLOCKS_1, ///< CS negating Extend 1 cycle |
| 84 | +} ospi_b_command_cs_pulldown_clocks_t; |
| 85 | + |
| 86 | +/** Prefetch function settings */ |
| 87 | +typedef enum e_ospi_b_prefetch_function |
| 88 | +{ |
| 89 | + OSPI_B_PREFETCH_FUNCTION_DISABLE = 0x00, ///< Prefetch function disable |
| 90 | + OSPI_B_PREFETCH_FUNCTION_ENABLE = 0x01, ///< Prefetch function enable |
| 91 | +} ospi_b_prefetch_function_t; |
| 92 | + |
| 93 | +/** Combination function settings */ |
| 94 | +typedef enum e_ospi_b_combination_function |
| 95 | +{ |
| 96 | + OSPI_B_COMBINATION_FUNCTION_DISABLE = 0x00, ///< Combination function disable |
| 97 | + OSPI_B_COMBINATION_FUNCTION_4BYTE = 0x01, ///< Combine up to 4 bytes |
| 98 | + OSPI_B_COMBINATION_FUNCTION_8BYTE = 0x03, ///< Combine up to 8 bytes |
| 99 | + OSPI_B_COMBINATION_FUNCTION_12BYTE = 0x05, ///< Combine up to 12 bytes |
| 100 | + OSPI_B_COMBINATION_FUNCTION_16BYTE = 0x07, ///< Combine up to 16 bytes |
| 101 | + OSPI_B_COMBINATION_FUNCTION_20BYTE = 0x09, ///< Combine up to 20 bytes |
| 102 | + OSPI_B_COMBINATION_FUNCTION_24BYTE = 0x0B, ///< Combine up to 24 bytes |
| 103 | + OSPI_B_COMBINATION_FUNCTION_28BYTE = 0x0D, ///< Combine up to 28 bytes |
| 104 | + OSPI_B_COMBINATION_FUNCTION_32BYTE = 0x0F, ///< Combine up to 32 bytes |
| 105 | + OSPI_B_COMBINATION_FUNCTION_36BYTE = 0x11, ///< Combine up to 36 bytes |
| 106 | + OSPI_B_COMBINATION_FUNCTION_40BYTE = 0x13, ///< Combine up to 40 bytes |
| 107 | + OSPI_B_COMBINATION_FUNCTION_44BYTE = 0x15, ///< Combine up to 44 bytes |
| 108 | + OSPI_B_COMBINATION_FUNCTION_48BYTE = 0x17, ///< Combine up to 48 bytes |
| 109 | + OSPI_B_COMBINATION_FUNCTION_52BYTE = 0x19, ///< Combine up to 52 bytes |
| 110 | + OSPI_B_COMBINATION_FUNCTION_56BYTE = 0x1B, ///< Combine up to 56 bytes |
| 111 | + OSPI_B_COMBINATION_FUNCTION_60BYTE = 0x1D, ///< Combine up to 60 bytes |
| 112 | + OSPI_B_COMBINATION_FUNCTION_64BYTE = 0x1F, ///< Combine up to 64 bytes |
| 113 | + OSPI_B_COMBINATION_FUNCTION_2BYTE = 0x1FF, ///< Combine up to 2 bytes |
| 114 | +} ospi_b_combination_function_t; |
| 115 | + |
| 116 | +/** Memory mapped timing */ |
| 117 | +typedef struct st_ospi_b_timing_setting |
| 118 | +{ |
| 119 | + ospi_b_command_interval_clocks_t command_to_command_interval; ///< Interval between 2 consecutive commands |
| 120 | + ospi_b_command_cs_pullup_clocks_t cs_pullup_lag; ///< Duration to de-assert CS line after the last command |
| 121 | + ospi_b_command_cs_pulldown_clocks_t cs_pulldown_lead; ///< Duration to assert CS line before the first command |
| 122 | +} ospi_b_timing_setting_t; |
| 123 | + |
| 124 | +/** Command set used for a protocol mode other than normal (1S-1S-1S) SPI. */ |
| 125 | +typedef struct st_ospi_b_xspi_command_set |
| 126 | +{ |
| 127 | + spi_flash_protocol_t protocol; ///< Protocol mode associated with this command set. |
| 128 | + ospi_b_command_bytes_t command_bytes; ///< Number of command bytes for each command code. |
| 129 | + uint16_t read_command; ///< Read command. |
| 130 | + uint16_t page_program_command; ///< Page program/write command. |
| 131 | + uint16_t write_enable_command; ///< Command to enable write or erase, set to 0x00 to ignore. |
| 132 | + uint16_t status_command; ///< Command to read the write status, set to 0x00 to ignore. |
| 133 | + uint8_t read_dummy_cycles; ///< Dummy cycles to be inserted for read commands. |
| 134 | + uint8_t program_dummy_cycles; ///< Dummy cycles to be inserted for page program commands. |
| 135 | + uint8_t status_dummy_cycles; ///< Dummy cycles to be inserted for status read commands. |
| 136 | + uint8_t erase_command_list_length; ///< Length of erase command list |
| 137 | + spi_flash_erase_command_t const * p_erase_command_list; ///< List of all erase commands and associated sizes |
| 138 | +} ospi_b_xspi_command_set_t; |
| 139 | + |
| 140 | +/* OSPI DOTF AES Key Lengths. */ |
| 141 | +typedef enum e_ospi_b_dotf_aes_key_length_words |
| 142 | +{ |
| 143 | + OSPI_B_DOTF_AES_KEY_LENGTH_WORDS_128 = 16U, |
| 144 | + OSPI_B_DOTF_AES_KEY_LENGTH_WORDS_192 = 24U, |
| 145 | + OSPI_B_DOTF_AES_KEY_LENGTH_WORDS_256 = 32U |
| 146 | +} ospi_b_dotf_aes_key_length_words_t; |
| 147 | + |
| 148 | +/* OSPI DOTF AES Type. */ |
| 149 | +typedef enum e_ospi_b_dotf_aes_key_type |
| 150 | +{ |
| 151 | + OSPI_B_DOTF_AES_KEY_TYPE_128 = 0U, |
| 152 | + OSPI_B_DOTF_AES_KEY_TYPE_192 = 1U, |
| 153 | + OSPI_B_DOTF_AES_KEY_TYPE_256 = 2U |
| 154 | +} ospi_b_dotf_aes_key_type_t; |
| 155 | + |
| 156 | +/* This structure is used to hold all the DOTF related configuration. */ |
| 157 | +typedef struct st_ospi_b_dotf_cfg |
| 158 | +{ |
| 159 | + ospi_b_dotf_aes_key_type_t key_type; |
| 160 | + uint32_t * p_start_addr; |
| 161 | + uint32_t * p_end_addr; |
| 162 | + uint32_t * p_key; |
| 163 | + uint32_t * p_iv; |
| 164 | +} ospi_b_dotf_cfg_t; |
| 165 | + |
| 166 | +/** OSPI_B Extended configuration. */ |
| 167 | +typedef struct st_ospi_b_extended_cfg |
| 168 | +{ |
| 169 | + ospi_b_device_number_t channel; ///< Device number to be used for memory device |
| 170 | + ospi_b_timing_setting_t const * p_timing_settings; ///< Memory-mapped timing settings. |
| 171 | + ospi_b_xspi_command_set_t const * p_xspi_command_set_list; ///< Additional protocol command sets; if additional protocol commands set are not used set this to NULL. |
| 172 | + uint8_t xspi_command_set_list_length; ///< Number of additional protocol command set defined. |
| 173 | + uint8_t * p_autocalibration_preamble_pattern_addr; ///< OctaFlash memory address holding the preamble pattern |
| 174 | + uint8_t data_latch_delay_clocks; ///< Specify delay between OM_DQS and OM_DQS Strobe. Set to 0 to auto-calibrate. Typical value is 0x80. |
| 175 | +#if OSPI_B_CFG_DMAC_SUPPORT_ENABLE |
| 176 | + transfer_instance_t const * p_lower_lvl_transfer; ///< DMA Transfer instance used for data transmission |
| 177 | +#endif |
| 178 | +#if OSPI_B_CFG_DOTF_SUPPORT_ENABLE |
| 179 | + ospi_b_dotf_cfg_t const * p_dotf_cfg; ///< DOTF Configuration |
| 180 | +#endif |
| 181 | + uint8_t read_dummy_cycles; ///< Dummy cycles to be inserted for read commands. |
| 182 | + uint8_t program_dummy_cycles; ///< Dummy cycles to be inserted for page program commands. |
| 183 | + uint8_t status_dummy_cycles; ///< Dummy cycles to be inserted for status read commands. |
| 184 | +} ospi_b_extended_cfg_t; |
| 185 | + |
| 186 | +/** Instance control block. DO NOT INITIALIZE. Initialization occurs when @ref spi_flash_api_t::open is called */ |
| 187 | +typedef struct st_ospi_b_instance_ctrl |
| 188 | +{ |
| 189 | + spi_flash_cfg_t const * p_cfg; // Pointer to initial configuration |
| 190 | + uint32_t open; // Whether or not driver is open |
| 191 | + spi_flash_protocol_t spi_protocol; // Current OSPI protocol selected |
| 192 | + ospi_b_device_number_t channel; // Device number to be used for memory device |
| 193 | + ospi_b_xspi_command_set_t const * p_cmd_set; // Command set for the active protocol mode. |
| 194 | +} ospi_b_instance_ctrl_t; |
| 195 | + |
| 196 | +/********************************************************************************************************************** |
| 197 | + * Exported global variables |
| 198 | + **********************************************************************************************************************/ |
| 199 | + |
| 200 | +/** @cond INC_HEADER_DEFS_SEC */ |
| 201 | +/** Filled in Interface API structure for this Instance. */ |
| 202 | +extern const spi_flash_api_t g_ospi_b_on_spi_flash; |
| 203 | + |
| 204 | +/** @endcond */ |
| 205 | + |
| 206 | +fsp_err_t R_OSPI_B_Open(spi_flash_ctrl_t * const p_ctrl, spi_flash_cfg_t const * const p_cfg); |
| 207 | +fsp_err_t R_OSPI_B_Close(spi_flash_ctrl_t * const p_ctrl); |
| 208 | +fsp_err_t R_OSPI_B_DirectWrite(spi_flash_ctrl_t * const p_ctrl, |
| 209 | + uint8_t const * const p_src, |
| 210 | + uint32_t const bytes, |
| 211 | + bool const read_after_write); |
| 212 | +fsp_err_t R_OSPI_B_DirectRead(spi_flash_ctrl_t * const p_ctrl, uint8_t * const p_dest, uint32_t const bytes); |
| 213 | +fsp_err_t R_OSPI_B_DirectTransfer(spi_flash_ctrl_t * const p_ctrl, |
| 214 | + spi_flash_direct_transfer_t * const p_transfer, |
| 215 | + spi_flash_direct_transfer_dir_t direction); |
| 216 | +fsp_err_t R_OSPI_B_SpiProtocolSet(spi_flash_ctrl_t * const p_ctrl, spi_flash_protocol_t spi_protocol); |
| 217 | +fsp_err_t R_OSPI_B_XipEnter(spi_flash_ctrl_t * const p_ctrl); |
| 218 | +fsp_err_t R_OSPI_B_XipExit(spi_flash_ctrl_t * const p_ctrl); |
| 219 | +fsp_err_t R_OSPI_B_Write(spi_flash_ctrl_t * const p_ctrl, |
| 220 | + uint8_t const * const p_src, |
| 221 | + uint8_t * const p_dest, |
| 222 | + uint32_t byte_count); |
| 223 | +fsp_err_t R_OSPI_B_Erase(spi_flash_ctrl_t * const p_ctrl, uint8_t * const p_device_address, uint32_t byte_count); |
| 224 | +fsp_err_t R_OSPI_B_StatusGet(spi_flash_ctrl_t * const p_ctrl, spi_flash_status_t * const p_status); |
| 225 | +fsp_err_t R_OSPI_B_BankSet(spi_flash_ctrl_t * const _ctrl, uint32_t bank); |
| 226 | +fsp_err_t R_OSPI_B_AutoCalibrate(spi_flash_ctrl_t * const p_ctrl); |
| 227 | + |
| 228 | +/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ |
| 229 | +FSP_FOOTER |
| 230 | + |
| 231 | +#endif |
| 232 | + |
| 233 | +/*******************************************************************************************************************//** |
| 234 | + * @} (end defgroup OSPI_B) |
| 235 | + **********************************************************************************************************************/ |
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