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Phuc Phamnhutnguyenkc
Phuc Pham
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nhutnguyenkc
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hal: renesas: rza: Add ADC support for RZ/A series
Add HAL FSP ADC files for RZ/A series Signed-off-by: Phuc Pham <[email protected]> Signed-off-by: Nhut Nguyen <[email protected]>
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‎drivers/rz/CMakeLists.txt

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@@ -39,8 +39,13 @@ zephyr_library_sources_ifdef(CONFIG_USE_RZ_FSP_IOPORT
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zephyr_library_sources_ifdef(CONFIG_USE_RZ_FSP_SCIF_UART
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fsp/src/${SOC_SERIES_PREFIX}/r_scif_uart/r_scif_uart.c)
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zephyr_library_sources_ifdef(CONFIG_USE_RZ_FSP_ADC
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fsp/src/${SOC_SERIES_PREFIX}/r_adc_c/r_adc_c.c)
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if(CONFIG_DT_HAS_RENESAS_RZ_ADC_C_ENABLED)
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zephyr_library_sources_ifdef(CONFIG_USE_RZ_FSP_ADC
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fsp/src/${SOC_SERIES_PREFIX}/r_adc_c/r_adc_c.c)
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else()
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zephyr_library_sources_ifdef(CONFIG_USE_RZ_FSP_ADC
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fsp/src/${SOC_SERIES_PREFIX}/r_adc/r_adc.c)
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endif()
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zephyr_library_sources_ifdef(CONFIG_USE_RZ_FSP_MHU
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fsp/src/${SOC_SERIES_PREFIX}/r_mhu_ns/r_mhu_ns.c)

‎drivers/rz/README

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@@ -58,3 +58,9 @@ Patch List:
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Replace the inclusion of cr/cr_compiler.h and cr/core_cr.h with core_cr8.h
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Impacted files:
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drivers/rz/fsp/src/rzv/bsp/cmsis/Device/RENESAS/Include/R9A09G057H.h
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* Rename adc_scan_end_isr to adc_c_scan_end_isr.
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Rename g_adc_on_adc to g_adc_on_adc_c with _c suffix.
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Impacted files:
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drivers/rz/fsp/src/rza/r_adc_c/r_adc_c.c
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drivers/rz/fsp/inc/instances/rza/r_adc_c.h

‎drivers/rz/fsp/inc/instances/rza/r_adc_c.h

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/*
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* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*******************************************************************************************************************//**
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* @addtogroup ADC
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* @{
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**********************************************************************************************************************/
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#ifndef R_ADC_C_H
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#define R_ADC_C_H
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/***********************************************************************************************************************
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* Includes
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**********************************************************************************************************************/
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#include <r_adc_c_cfg.h>
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#include "r_adc_api.h"
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#include "bsp_api.h"
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/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
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FSP_HEADER
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/***********************************************************************************************************************
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* Macro definitions
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**********************************************************************************************************************/
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/** For ADC Scan configuration adc_channel_cfg_t::scan_mask.
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* Use bitwise OR to combine these masks for desired channels. */
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typedef enum e_adc_c_mask
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{
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ADC_C_MASK_OFF = (0U), ///< No channels selected
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ADC_C_MASK_CHANNEL_0 = (1U << 0U), ///< Channel 0 mask
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ADC_C_MASK_CHANNEL_1 = (1U << 1U), ///< Channel 1 mask
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} adc_c_mask_t;
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/** ADC trigger mode select */
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typedef enum e_adc_c_trigger_mode
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{
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ADC_C_TRIGGER_MODE_SOFTWARE = 0U, ///< Software trigger mode
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ADC_C_TRIGGER_MODE_HARDWARE = 1U, ///< Hardware trigger mode
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} adc_c_trigger_mode_t;
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/** ADC hardware trigger source select */
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typedef enum e_adc_c_active_trigger
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{
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ADC_C_ACTIVE_TRIGGER_EXTERNAL = 0U, ///< External trigger input
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ADC_C_ACTIVE_TRIGGER_TRGA0N = 1U, ///< Compare match with or input capture to MTU0.TGRA
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ADC_C_ACTIVE_TRIGGER_TRGA1N = 2U, ///< Compare match with or input capture to MTU1.TGRA
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ADC_C_ACTIVE_TRIGGER_TRGA2N = 3U, ///< Compare match with or input capture to MTU2.TGRA
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ADC_C_ACTIVE_TRIGGER_TRGA3N = 4U, ///< Compare match with or input capture to MTU3.TGRA
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ADC_C_ACTIVE_TRIGGER_TRGA4N = 5U, ///< Compare match with or input capture to MTU4.TGRA
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ADC_C_ACTIVE_TRIGGER_TRGA6N = 6U, ///< Compare match with or input capture to MTU6.TGRA
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ADC_C_ACTIVE_TRIGGER_TRGA7N = 7U, ///< Compare match with or input capture to MTU7.TGRA
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ADC_C_ACTIVE_TRIGGER_TRG0N = 8U, ///< Compare match with MTU0.TGRE
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ADC_C_ACTIVE_TRIGGER_TRG4AN = 9U, ///< Compare match between MTU4.TADCORA and MTU4.TCNT
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ADC_C_ACTIVE_TRIGGER_TRG4BN = 10U, ///< Compare match between MTU4.TADCORB and MTU4.TCNT
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ADC_C_ACTIVE_TRIGGER_TRG4AN_BN = 11U, ///< Compare match between MTU4.TADCORA and MTU4.TCNT, or between MTU4.TADCORB and MTU4.TCNT
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ADC_C_ACTIVE_TRIGGER_TRG4ABN = 12U, ///< Compare match between MTU4.TADCORA and MTU4.TCNT, and between MTU4.TADCORB and MTU4.TCNT (when interrupt skipping function 2 is in use)
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ADC_C_ACTIVE_TRIGGER_TRG7AN = 13U, ///< Compare match between MTU7.TADCORA and MTU7.TCNT
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ADC_C_ACTIVE_TRIGGER_TRG7BN = 14U, ///< Compare match between MTU7.TADCORB and MTU7.TCNT
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ADC_C_ACTIVE_TRIGGER_TRG7AN_BN = 15U, ///< Compare match between MTU7.TADCORA and MTU7.TCNT, or between MTU7.TADCORB and MTU7.TCNT
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ADC_C_ACTIVE_TRIGGER_TRG7ABN = 16U, ///< Compare match between MTU7.TADCORA and MTU7.TCNT, and between MTU7.TADCORB and MTU7.TCNT
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} adc_c_active_trigger_t;
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/** valid edge of the trigger select */
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typedef enum e_adc_c_trigger_edge
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{
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ADC_C_TRIGGER_EDGE_FALLING = 1U, ///< Falling edge
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ADC_C_TRIGGER_EDGE_RISING = 2U, ///< Rising edge
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ADC_C_TRIGGER_EDGE_BOTH = 3U, ///< Both edges
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} adc_c_trigger_edge_t;
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/** ADC trigger input mode select */
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typedef enum e_adc_c_input_mode
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{
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ADC_C_INPUT_MODE_AUTO = 0U, ///< Auto mode
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ADC_C_INPUT_MODE_STEP = 1U, ///< Step mode
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} adc_c_input_mode_t;
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/** ADC operating mode select */
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typedef enum e_adc_c_operating_mode
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{
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ADC_C_OPERATING_MODE_SCAN = 0U, ///< Scan mode
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ADC_C_OPERATING_MODE_SELECT = 1U, ///< Select mode
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} adc_c_operating_mode_t;
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/** ADC buffer mode select */
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typedef enum e_adc_c_buffer_mode
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{
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ADC_C_BUFFER_MODE_1 = 0U, ///< 1-buffer mode
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ADC_C_BUFFER_MODE_4 = 1U, ///< 4-buffer mode
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} adc_c_buffer_mode_t;
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/** Select the number of stages of the AD external trigger pin filter. */
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typedef enum e_adc_c_filter_stage_setting
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{
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ADC_C_FILTER_STAGE_SETTING_DISABLE = 0U, ///< Filter is disabled.
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ADC_C_FILTER_STAGE_SETTING_4 = 1U, ///< 12.5 ns (80 MHz) x 4 stages
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ADC_C_FILTER_STAGE_SETTING_8 = 2U, ///< 12.5 ns (80 MHz) x 8 stages
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ADC_C_FILTER_STAGE_SETTING_12 = 3U, ///< 12.5 ns (80 MHz) x 12 stages
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ADC_C_FILTER_STAGE_SETTING_16 = 4U, ///< 12.5 ns (80 MHz) x 16 stages
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} adc_c_filter_stage_setting_t;
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/** Enable or disable the conversion end interrupt of channel */
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typedef enum e_adc_c_interrupt_channel_setting
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{
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ADC_C_INTERRUPT_CHANNEL_SETTING_DISABLE = 0, ///< Interrupt output is disabled.
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ADC_C_INTERRUPT_CHANNEL_SETTING_ENABLE = 1, ///< Interrupt output is enabled.
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} adc_c_interrupt_channel_setting_t;
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/** Extended configuration structure for ADC. */
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typedef struct st_adc_c_extended_cfg
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{
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adc_c_trigger_mode_t trigger_mode; ///< Trigger mode.
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adc_c_active_trigger_t trigger_source; ///< Hardware trigger source.
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adc_c_trigger_edge_t trigger_edge; ///< Valid edge of the trigger source.
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adc_c_input_mode_t input_mode; ///< Trigger input mode.
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adc_c_operating_mode_t operating_mode; ///< Operating mode.
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adc_c_buffer_mode_t buffer_mode; ///< Buffer mode.
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uint16_t sampling_time; ///< Sampling period. (6~2800)
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adc_c_filter_stage_setting_t external_trigger_filter; ///< AD external trigger pin filter.
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} adc_c_extended_cfg_t;
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/** ADC channel(s) configuration */
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typedef struct st_adc_c_channel_cfg
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{
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uint32_t scan_mask; ///< Channels/bits: bit 0 is ch0; bit 1 is ch1.
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adc_c_interrupt_channel_setting_t interrupt_setting; ///< Interrupt setting.
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} adc_c_channel_cfg_t;
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/***********************************************************************************************************************
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* Typedef definitions
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**********************************************************************************************************************/
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/** ADC instance control block. DO NOT INITIALIZE. Initialized in @ref adc_api_t::open(). */
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typedef struct
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{
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R_ADC_Type * p_reg; // Base register
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adc_cfg_t const * p_cfg;
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uint32_t opened; // Boolean to verify that the Unit has been initialized
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uint32_t initialized; // Initialized status of ADC
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uint32_t scan_mask; // Scan mask used for Normal scan
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uint32_t scan_start;
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uint32_t operating_mode;
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uint32_t buffer_mode;
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void (* p_callback)(adc_callback_args_t *); // Pointer to callback that is called when an adc_event_t occurs.
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adc_callback_args_t * p_callback_memory; // Pointer to non-secure memory that can be used to pass arguments to a callback in non-secure memory.
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/* Pointer to context to be passed into callback function */
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void const * p_context;
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} adc_c_instance_ctrl_t;
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/**********************************************************************************************************************
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* Exported global variables
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**********************************************************************************************************************/
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/** @cond INC_HEADER_DEFS_SEC */
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/** Interface Structure for user access */
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extern const adc_api_t g_adc_on_adc_c;
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/** @endcond */
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/***********************************************************************************************************************
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* Public APIs
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**********************************************************************************************************************/
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fsp_err_t R_ADC_C_Open(adc_ctrl_t * p_ctrl, adc_cfg_t const * const p_cfg);
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fsp_err_t R_ADC_C_ScanCfg(adc_ctrl_t * p_ctrl, void const * const p_channel_cfg);
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fsp_err_t R_ADC_C_InfoGet(adc_ctrl_t * p_ctrl, adc_info_t * p_adc_info);
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fsp_err_t R_ADC_C_ScanStart(adc_ctrl_t * p_ctrl);
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fsp_err_t R_ADC_C_ScanGroupStart(adc_ctrl_t * p_ctrl, adc_group_mask_t group_id);
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fsp_err_t R_ADC_C_ScanStop(adc_ctrl_t * p_ctrl);
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fsp_err_t R_ADC_C_StatusGet(adc_ctrl_t * p_ctrl, adc_status_t * p_status);
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fsp_err_t R_ADC_C_Read(adc_ctrl_t * p_ctrl, adc_channel_t const reg_id, uint16_t * const p_data);
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fsp_err_t R_ADC_C_Read32(adc_ctrl_t * p_ctrl, adc_channel_t const reg_id, uint32_t * const p_data);
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fsp_err_t R_ADC_C_SampleStateCountSet(adc_ctrl_t * p_ctrl, uint16_t num_states);
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fsp_err_t R_ADC_C_Close(adc_ctrl_t * p_ctrl);
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fsp_err_t R_ADC_C_OffsetSet(adc_ctrl_t * const p_ctrl, adc_channel_t const reg_id, int32_t offset);
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fsp_err_t R_ADC_C_Calibrate(adc_ctrl_t * const p_ctrl, void const * p_extend);
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fsp_err_t R_ADC_C_CallbackSet(adc_ctrl_t * const p_api_ctrl,
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void ( * p_callback)(adc_callback_args_t *),
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void const * const p_context,
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adc_callback_args_t * const p_callback_memory);
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/*******************************************************************************************************************//**
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* @} (end defgroup ADC)
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**********************************************************************************************************************/
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/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
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FSP_FOOTER
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#endif

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