wiseconnect: Remove ceil() function

Replace ceil() from rsi_adc.c and rsi_dac.c
by a local function with similar implementation

Signed-off-by: Sai Santhosh Malae <[email protected]>
Signed-off-by: Jérôme Pouiller <[email protected]>

Author: smalae

wiseconnect/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/rsi_dac.h

@@ -116,6 +116,14 @@ __STATIC_INLINE uint8_t analog_get_power_state(void)
 {
   return analog_power_ctrl.analog_power;
 }
+
+__STATIC_INLINE float siwx91x_ceil(float x)
+{
+  int val_int = (int)x;
+
+  return (x > (float)val_int) ? (float)(val_int + 1) : (float)val_int;
+}
+
 uint32_t DAC_Init(uint8_t operation_mode, uint32_t sampling_rate, daccallbacFunc event);
 
 rsi_error_t DAC_WriteData_StaticMode(int16_t input_data);

wiseconnect/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_adc.c

@@ -299,7 +299,7 @@ STATIC INLINE void config_ch_freq(adc_ch_config_t adcChConfig, adc_config_t adcC
 
   // Configure channel frequency value for channel0
   adcInterConfig.ch_sampling_factor[*sampl_rate_index] =
-    (uint16_t)ceil(fs_adc / adcChConfig.sampling_rate[*sampl_rate_index]);
+    (uint16_t)siwx91x_ceil(fs_adc / adcChConfig.sampling_rate[*sampl_rate_index]);
 
   if (adcInterConfig.ch_sampling_factor[*sampl_rate_index] < 2) {
     adcInterConfig.ch_sampling_factor[*sampl_rate_index] = 2;
@@ -314,7 +314,7 @@ STATIC INLINE void config_ch_freq(adc_ch_config_t adcChConfig, adc_config_t adcC
       // Configure channel frequency value
       adcInterConfig.ch_sampling_factor[ch_num] =
         adcInterConfig.ch_sampling_factor[ch_num - 1]
-        * (uint16_t)ceil(adcChConfig.sampling_rate[ch_num - 1] / adcChConfig.sampling_rate[ch_num]);
+        * (uint16_t)siwx91x_ceil(adcChConfig.sampling_rate[ch_num - 1] / adcChConfig.sampling_rate[ch_num]);
     }
 
     /* Check configured channel frequency value is power of 2 or not,
@@ -370,18 +370,18 @@ rsi_error_t ADC_ChannelConfig(adc_ch_config_t adcChConfig, adc_config_t adcConfi
   f_sample_rate_achive = max_sample_rate_achive(min_sampl_time); // Need to implement   Step2
 
   // Find out total number of ADC cycle
-  total_clk = (uint16_t)ceil((1 / (float)f_sample_rate_achive) / (1 / (float)adc_commn_config.adc_clk_src));
+  total_clk = (uint16_t)siwx91x_ceil((1 / (float)f_sample_rate_achive) / (1 / (float)adc_commn_config.adc_clk_src));
 
   // Find out number of ON cycles in total ADC cycle
-  on_clk = (uint16_t)ceil(min_sampl_time / (1 / (float)adc_commn_config.adc_clk_src));
+  on_clk = (uint16_t)siwx91x_ceil(min_sampl_time / (1 / (float)adc_commn_config.adc_clk_src));
 
   if (total_clk == on_clk) {
     total_clk += 1;
   }
 
   // modify the total cycle number for ADC static mode operation
-  if (adcConfig.operation_mode && (total_clk < ceil(adc_commn_config.adc_clk_src / adcChConfig.sampling_rate[0]))) {
-    total_clk = (uint16_t)ceil(adc_commn_config.adc_clk_src / adcChConfig.sampling_rate[0]);
+  if (adcConfig.operation_mode && (total_clk < siwx91x_ceil(adc_commn_config.adc_clk_src / adcChConfig.sampling_rate[0]))) {
+    total_clk = (uint16_t)siwx91x_ceil(adc_commn_config.adc_clk_src / adcChConfig.sampling_rate[0]);
   }
 
   adc_commn_config.on_clk    = on_clk;
@@ -542,19 +542,19 @@ rsi_error_t ADC_Per_ChannelConfig(adc_ch_config_t adcChConfig, adc_config_t adcC
   f_sample_rate_achive = max_sample_rate_achive(min_sampl_time); // Need to implement   Step2
 
   // Find out total number of ADC cycle
-  total_clk = (uint16_t)ceil((1 / (float)f_sample_rate_achive) / (1 / (float)adc_commn_config.adc_clk_src));
+  total_clk = (uint16_t)siwx91x_ceil((1 / (float)f_sample_rate_achive) / (1 / (float)adc_commn_config.adc_clk_src));
 
   // Find out number of ON cycles in total ADC cycle
-  on_clk = (uint16_t)ceil((min_sampl_time / (1 / (float)adc_commn_config.adc_clk_src)));
+  on_clk = (uint16_t)siwx91x_ceil((min_sampl_time / (1 / (float)adc_commn_config.adc_clk_src)));
 
   if (total_clk == on_clk) {
     total_clk = total_clk + 1;
   }
 
   // modify the total cycle number for ADC static mode operation
   if ((adcConfig.operation_mode)
-      && (total_clk < ceil(adc_commn_config.adc_clk_src / adcChConfig.sampling_rate[adc_channel]))) {
-    total_clk = (uint16_t)ceil(adc_commn_config.adc_clk_src / adcChConfig.sampling_rate[adc_channel]);
+      && (total_clk < siwx91x_ceil(adc_commn_config.adc_clk_src / adcChConfig.sampling_rate[adc_channel]))) {
+    total_clk = (uint16_t)siwx91x_ceil(adc_commn_config.adc_clk_src / adcChConfig.sampling_rate[adc_channel]);
   }
 
   adc_commn_config.on_clk    = on_clk;

wiseconnect/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_dac.c

@@ -252,7 +252,7 @@ uint32_t dac_set_clock(uint32_t sampl_rate)
     clk_src_val = RSI_CLK_GetBaseClock(ULPSS_AUX);
 
     if ((clk_src_val * 2) >= sampl_rate) {
-      clk_div_fac = (uint16_t)(ceil((2 * clk_src_val) / sampl_rate));
+      clk_div_fac = (uint16_t)(siwx91x_ceil((2 * clk_src_val) / sampl_rate));
       if (clk_div_fac > 0x03FF) {
         clk_div_fac = 0x03FF;
       }
@@ -261,7 +261,7 @@ uint32_t dac_set_clock(uint32_t sampl_rate)
     }
     return clk_src_val;
   } else {
-    clk_div_fac = (uint16_t)ceil((2 * system_clocks.ulpss_ref_clk) / sampl_rate);
+    clk_div_fac = (uint16_t)siwx91x_ceil((2 * system_clocks.ulpss_ref_clk) / sampl_rate);
     if (clk_div_fac > 0x03FF) {
       clk_div_fac = 0x03FF;
     }