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FRASTMerwango
FRASTM
authored and
erwango
committed
stm32cube: update stm32u0 to cube version V1.3.0
Update Cube version for STM32U0xx series on https://github.com/STMicroelectronics from version v1.2.0 to version v1.3.0 Signed-off-by: F. Ramu <[email protected]>
1 parent 41d443d commit 1c11948

36 files changed

+7918
-7847
lines changed

‎stm32cube/stm32u0xx/README‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ Origin:
66
https://www.st.com/en/embedded-software/stm32cubeu0.html
77

88
Status:
9-
version v1.2.0
9+
version v1.3.0
1010

1111
Purpose:
1212
ST Microelectronics official MCU package for STM32U0 series.
@@ -23,7 +23,7 @@ URL:
2323
https://github.com/STMicroelectronics/STM32CubeU0
2424

2525
Commit:
26-
6f2310fce68e53f7277583774141bbf016df1838
26+
b42482973bdd79b8bd6403091938828be0063a13
2727

2828
Maintained-by:
2929
External

‎stm32cube/stm32u0xx/drivers/include/Legacy/stm32_hal_legacy.h‎

Lines changed: 15 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -538,6 +538,10 @@ extern "C" {
538538
#define FLASH_FLAG_WDW FLASH_FLAG_WBNE
539539
#define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL
540540
#endif /* STM32H7 */
541+
#if defined(STM32H7RS)
542+
#define FLASH_OPTKEY1 FLASH_OPT_KEY1
543+
#define FLASH_OPTKEY2 FLASH_OPT_KEY2
544+
#endif /* STM32H7RS */
541545
#if defined(STM32U5)
542546
#define OB_USER_nRST_STOP OB_USER_NRST_STOP
543547
#define OB_USER_nRST_STDBY OB_USER_NRST_STDBY
@@ -560,6 +564,9 @@ extern "C" {
560564
#define OB_nBOOT0_RESET OB_NBOOT0_RESET
561565
#define OB_nBOOT0_SET OB_NBOOT0_SET
562566
#endif /* STM32U0 */
567+
#if defined(STM32H5)
568+
#define FLASH_ECC_AREA_EDATA FLASH_ECC_AREA_EDATA_BANK1
569+
#endif /* STM32H5 */
563570

564571
/**
565572
* @}
@@ -1299,22 +1306,22 @@ extern "C" {
12991306
#define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL
13001307
#endif /* STM32H5 || STM32WBA || STM32H7RS || STM32N6 */
13011308

1302-
#if defined(STM32F7)
1309+
#if defined(STM32F7) || defined(STM32WB)
13031310
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK
13041311
#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_IT_ENABLE_BITS_MASK
1305-
#endif /* STM32F7 */
1312+
#endif /* STM32F7 || STM32WB */
13061313

13071314
#if defined(STM32H7)
13081315
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_X
13091316
#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_X_INTERRUPT
13101317
#endif /* STM32H7 */
13111318

1312-
#if defined(STM32F7) || defined(STM32H7) || defined(STM32L0)
1319+
#if defined(STM32F7) || defined(STM32H7) || defined(STM32L0) || defined(STM32WB)
13131320
#define RTC_TAMPER1_INTERRUPT RTC_IT_TAMP1
13141321
#define RTC_TAMPER2_INTERRUPT RTC_IT_TAMP2
13151322
#define RTC_TAMPER3_INTERRUPT RTC_IT_TAMP3
13161323
#define RTC_ALL_TAMPER_INTERRUPT RTC_IT_TAMP
1317-
#endif /* STM32F7 || STM32H7 || STM32L0 */
1324+
#endif /* STM32F7 || STM32H7 || STM32L0 || STM32WB */
13181325

13191326
/**
13201327
* @}
@@ -1481,7 +1488,7 @@ extern "C" {
14811488
#define TIM_TIM3_TI1_COMP1COMP2_OUT TIM_TIM3_TI1_COMP1_COMP2
14821489
#endif
14831490

1484-
#if defined(STM32U5)
1491+
#if defined(STM32U5) || defined(STM32MP2)
14851492
#define OCREF_CLEAR_SELECT_Pos OCREF_CLEAR_SELECT_POS
14861493
#define OCREF_CLEAR_SELECT_Msk OCREF_CLEAR_SELECT_MSK
14871494
#endif
@@ -3695,7 +3702,7 @@ extern "C" {
36953702
#endif
36963703

36973704
#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \
3698-
defined(STM32WL) || defined(STM32C0) || defined(STM32N6) || defined(STM32H7RS) || defined(STM32U0)
3705+
defined(STM32WL) || defined(STM32C0) || defined(STM32N6) || defined(STM32H7RS) || defined(STM32U0)
36993706
#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
37003707
#else
37013708
#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
@@ -3946,8 +3953,8 @@ extern "C" {
39463953
*/
39473954
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \
39483955
defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \
3949-
defined (STM32WBA) || defined (STM32V7) || defined (STM32H5) || defined (STM32C0) || defined (STM32N6) || \
3950-
defined (STM32H7RS) || defined (STM32U0) || defined (STM32U3)
3956+
defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32N6) || defined (STM32H7RS) || \
3957+
defined (STM32U0) || defined (STM32U3)
39513958
#else
39523959
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
39533960
#endif

‎stm32cube/stm32u0xx/drivers/include/stm32u0xx_hal.h‎

Lines changed: 12 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -45,10 +45,13 @@ extern "C" {
4545
/** @defgroup HAL_TICK_FREQ Tick Frequency
4646
* @{
4747
*/
48-
#define HAL_TICK_FREQ_10HZ 100U
49-
#define HAL_TICK_FREQ_100HZ 10U
50-
#define HAL_TICK_FREQ_1KHZ 1U
51-
#define HAL_TICK_FREQ_DEFAULT HAL_TICK_FREQ_1KHZ
48+
typedef enum
49+
{
50+
HAL_TICK_FREQ_10HZ = 100U,
51+
HAL_TICK_FREQ_100HZ = 10U,
52+
HAL_TICK_FREQ_1KHZ = 1U,
53+
HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ
54+
} HAL_TickFreqTypeDef;
5255

5356
/**
5457
* @}
@@ -687,8 +690,8 @@ void HAL_IncTick(void);
687690
void HAL_Delay(uint32_t Delay);
688691
uint32_t HAL_GetTick(void);
689692
uint32_t HAL_GetTickPrio(void);
690-
HAL_StatusTypeDef HAL_SetTickFreq(uint32_t Freq);
691-
uint32_t HAL_GetTickFreq(void);
693+
HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq);
694+
HAL_TickFreqTypeDef HAL_GetTickFreq(void);
692695
void HAL_SuspendTick(void);
693696
void HAL_ResumeTick(void);
694697
uint32_t HAL_GetHalVersion(void);
@@ -720,9 +723,9 @@ void HAL_DBGMCU_DisableDBGStandbyMode(void);
720723
/** @addtogroup HAL_Exported_Variables
721724
* @{
722725
*/
723-
extern __IO uint32_t uwTick;
724-
extern uint32_t uwTickPrio;
725-
extern uint32_t uwTickFreq;
726+
extern __IO uint32_t uwTick;
727+
extern uint32_t uwTickPrio;
728+
extern HAL_TickFreqTypeDef uwTickFreq;
726729
/**
727730
* @}
728731
*/

‎stm32cube/stm32u0xx/drivers/include/stm32u0xx_hal_comp.h‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -686,7 +686,8 @@ typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer
686686
((__WINDOWOUTPUT__) == COMP_WINDOWOUTPUT_BOTH) )
687687

688688
#define IS_COMP_POWERMODE(__POWERMODE__) (((__POWERMODE__) == COMP_POWERMODE_HIGHSPEED) || \
689-
((__POWERMODE__) == COMP_POWERMODE_MEDIUMSPEED) )
689+
((__POWERMODE__) == COMP_POWERMODE_MEDIUMSPEED) || \
690+
((__POWERMODE__) == COMP_POWERMODE_ULTRALOWPOWER) )
690691

691692
#define IS_COMP_INPUT_PLUS(__COMP_INSTANCE__, __INPUT_PLUS__) (((__COMP_INSTANCE__) == COMP1) \
692693
? (((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO1) || \

‎stm32cube/stm32u0xx/drivers/include/stm32u0xx_hal_cryp.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -177,7 +177,7 @@ typedef struct
177177

178178
uint32_t IV_saved[4]; /*!< copy of Initialisation Vector registers */
179179

180-
uint32_t SUSPxR_saved[8]; /*!< copy of suspension registers */
180+
uint32_t SUSPRx_saved[8]; /*!< copy of suspension registers */
181181

182182
uint32_t CR_saved; /*!< copy of CRYP control register when processing is suspended*/
183183

‎stm32cube/stm32u0xx/drivers/include/stm32u0xx_hal_flash.h‎

Lines changed: 6 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -292,7 +292,7 @@ typedef struct
292292
* @{
293293
*/
294294
#define OB_USER_BOR_EN FLASH_OPTR_BOR_EN /*!< BOR reset enable */
295-
#define OB_USER_BOR_LEV (FLASH_OPTR_BORF_LEV | FLASH_OPTR_BORR_LEV) /*!< BOR reset Level */
295+
#define OB_USER_BOR_LEV FLASH_OPTR_BOR_LEV /*!< BOR reset Level */
296296
#define OB_USER_NRST_STOP FLASH_OPTR_nRST_STOP /*!< Reset generated when entering the stop mode */
297297
#define OB_USER_NRST_STDBY FLASH_OPTR_nRST_STDBY /*!< Reset generated when entering the standby mode */
298298
#define OB_USER_NRST_SHDW FLASH_OPTR_nRST_SHDW /*!< Reset generated when entering the shutdown mode */
@@ -328,14 +328,11 @@ typedef struct
328328
/** @defgroup FLASH_OB_USER_BOR_LEVEL FLASH Option Bytes User BOR Level
329329
* @{
330330
*/
331-
#define OB_BOR_LEVEL_FALLING_0 0x00000000U /*!< BOR falling level 1 with threshold around 2.0V */
332-
#define OB_BOR_LEVEL_FALLING_1 FLASH_OPTR_BORF_LEV_0 /*!< BOR falling level 2 with threshold around 2.2V */
333-
#define OB_BOR_LEVEL_FALLING_2 FLASH_OPTR_BORF_LEV_1 /*!< BOR falling level 3 with threshold around 2.5V */
334-
#define OB_BOR_LEVEL_FALLING_3 (FLASH_OPTR_BORF_LEV_0 | FLASH_OPTR_BORF_LEV_1) /*!< BOR falling level 4 with threshold around 2.8V */
335-
#define OB_BOR_LEVEL_RISING_0 0x00000000U /*!< BOR rising level 1 with threshold around 2.1V */
336-
#define OB_BOR_LEVEL_RISING_1 FLASH_OPTR_BORR_LEV_0 /*!< BOR rising level 2 with threshold around 2.3V */
337-
#define OB_BOR_LEVEL_RISING_2 FLASH_OPTR_BORR_LEV_1 /*!< BOR rising level 3 with threshold around 2.6V */
338-
#define OB_BOR_LEVEL_RISING_3 (FLASH_OPTR_BORR_LEV_0 | FLASH_OPTR_BORR_LEV_1) /*!< BOR rising level 4 with threshold around 2.9V */
331+
#define OB_BOR_LEVEL_0 0x00000000U /*!< BOR level 0 with threshold around 2.0V */
332+
#define OB_BOR_LEVEL_1 FLASH_OPTR_BOR_LEV_0 /*!< BOR level 1 with threshold around 2.2V */
333+
#define OB_BOR_LEVEL_2 FLASH_OPTR_BOR_LEV_1 /*!< BOR level 2 with threshold around 2.5V */
334+
#define OB_BOR_LEVEL_3 (FLASH_OPTR_BOR_LEV_0 | FLASH_OPTR_BOR_LEV_1) /*!< BOR level 3 with threshold around 2.8V */
335+
339336
/**
340337
* @}
341338
*/

‎stm32cube/stm32u0xx/drivers/include/stm32u0xx_hal_pwr_ex.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -225,7 +225,7 @@ typedef struct
225225
*/
226226

227227
/** @defgroup PWREx_Flag PWR Status Flags
228-
* Elements values convention: 0000 0000 0XXY YYYYb
228+
* Elements values convention: 0000 00XX 000Y YYYYb
229229
* - Y YYYY : Flag position in the XX register (5 bits)
230230
* - XX : Status register (2 bits)
231231
* - 01: SR1 register
@@ -254,7 +254,7 @@ typedef struct
254254
#define PWR_FLAG_PVMO_USB 0x020CU /*!< Power Voltage Monitoring 1 output flag */
255255
#define PWR_FLAG_PVMO_ADC 0x020EU /*!< Power Voltage Monitoring 3 output flag */
256256
#define PWR_FLAG_PVMO_DAC 0x020FU /*!< Power Voltage Monitoring 4 output flag */
257-
#define PWR_SCR_CWUF 0x002FU /*!< Clear Wake-up Flags */
257+
#define PWR_SCR_CWUF 0x005FU /*!< Clear Wake-up Flags */
258258
/**
259259
* @}
260260
*/

‎stm32cube/stm32u0xx/drivers/include/stm32u0xx_hal_rcc.h‎

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -478,33 +478,33 @@ typedef struct
478478
| Index | AF | Port | Pin |
479479
-------------------------------*/
480480

481-
#define RCC_MCO_GPIOPORT_POS 16U
481+
#define RCC_MCO_GPIOPORT_POS 16UL
482482
#define RCC_MCO_GPIOPORT_MASK (0xFUL << RCC_MCO_GPIOPORT_POS)
483-
#define RCC_MCO_GPIOAF_POS 20U
483+
#define RCC_MCO_GPIOAF_POS 20UL
484484
#define RCC_MCO_GPIOAF_MASK (0xFFUL << RCC_MCO_GPIOAF_POS)
485-
#define RCC_MCO_INDEX_POS 28U
485+
#define RCC_MCO_INDEX_POS 28UL
486486
#define RCC_MCO_INDEX_MASK (0x1UL << RCC_MCO_INDEX_POS)
487487
#define RCC_MCO1_INDEX (0x0UL << RCC_MCO_INDEX_POS) /*!< MCO1 index */
488488
#define RCC_MCO1_PA8 (RCC_MCO1_INDEX |\
489-
(GPIO_AF0_MCO << RCC_MCO_GPIOAF_POS) | \
489+
(RCC_MCO_GPIOAF_MASK & ((uint32_t)GPIO_AF0_MCO << RCC_MCO_GPIOAF_POS)) | \
490490
(GPIO_GET_INDEX(GPIOA) << RCC_MCO_GPIOPORT_POS) | GPIO_PIN_8)
491491
#define RCC_MCO1_PA9 (RCC_MCO1_INDEX |\
492-
(GPIO_AF0_MCO << RCC_MCO_GPIOAF_POS) | \
492+
(RCC_MCO_GPIOAF_MASK & ((uint32_t)GPIO_AF0_MCO << RCC_MCO_GPIOAF_POS)) | \
493493
(GPIO_GET_INDEX(GPIOA) << RCC_MCO_GPIOPORT_POS) | GPIO_PIN_9)
494494
#define RCC_MCO1_PF2 (RCC_MCO1_INDEX |\
495-
(GPIO_AF0_MCO << RCC_MCO_GPIOAF_POS) | \
495+
(RCC_MCO_GPIOAF_MASK & ((uint32_t)GPIO_AF0_MCO << RCC_MCO_GPIOAF_POS)) | \
496496
(GPIO_GET_INDEX(GPIOF) << RCC_MCO_GPIOPORT_POS) | GPIO_PIN_2)
497497
#define RCC_MCO1 RCC_MCO1_PA8
498498

499499
#define RCC_MCO2_INDEX (0x1UL << RCC_MCO_INDEX_POS) /*!< MCO2 index */
500500
#define RCC_MCO2_PC2 (RCC_MCO2_INDEX |\
501-
(GPIO_AF0_MCO2 << RCC_MCO_GPIOAF_POS) | \
501+
(RCC_MCO_GPIOAF_MASK & ((uint32_t)GPIO_AF0_MCO2 << RCC_MCO_GPIOAF_POS)) | \
502502
(GPIO_GET_INDEX(GPIOC) << RCC_MCO_GPIOPORT_POS) | GPIO_PIN_2)
503503
#define RCC_MCO2_PA10 (RCC_MCO2_INDEX |\
504-
(GPIO_AF3_MCO2 << RCC_MCO_GPIOAF_POS) | \
504+
(RCC_MCO_GPIOAF_MASK & ((uint32_t)GPIO_AF3_MCO2 << RCC_MCO_GPIOAF_POS)) | \
505505
(GPIO_GET_INDEX(GPIOA) << RCC_MCO_GPIOPORT_POS) | GPIO_PIN_10)
506506
#define RCC_MCO2_PA8 (RCC_MCO2_INDEX |\
507-
(GPIO_AF3_MCO2 << RCC_MCO_GPIOAF_POS) | \
507+
(RCC_MCO_GPIOAF_MASK & ((uint32_t)GPIO_AF3_MCO2 << RCC_MCO_GPIOAF_POS)) | \
508508
(GPIO_GET_INDEX(GPIOA) << RCC_MCO_GPIOPORT_POS) | GPIO_PIN_8)
509509
#define RCC_MCO2 RCC_MCO2_PC2
510510

‎stm32cube/stm32u0xx/drivers/include/stm32u0xx_hal_rtc.h‎

Lines changed: 12 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -590,6 +590,7 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to
590590
*/
591591
#define __HAL_RTC_WRITEPROTECTION_DISABLE(__HANDLE__) \
592592
do{ \
593+
UNUSED(__HANDLE__); \
593594
RTC->WPR = 0xCAU; \
594595
RTC->WPR = 0x53U; \
595596
} while(0U)
@@ -601,6 +602,7 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to
601602
*/
602603
#define __HAL_RTC_WRITEPROTECTION_ENABLE(__HANDLE__) \
603604
do{ \
605+
UNUSED(__HANDLE__); \
604606
RTC->WPR = 0xFFU; \
605607
} while(0U)
606608

@@ -643,28 +645,28 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to
643645
* @param __HANDLE__ specifies the RTC handle.
644646
* @retval None
645647
*/
646-
#define __HAL_RTC_ALARMA_ENABLE(__HANDLE__) (RTC->CR |= (RTC_CR_ALRAE))
648+
#define __HAL_RTC_ALARMA_ENABLE(__HANDLE__) (UNUSED(__HANDLE__), (RTC->CR |= (RTC_CR_ALRAE)))
647649

648650
/**
649651
* @brief Disable the RTC ALARMA peripheral.
650652
* @param __HANDLE__ specifies the RTC handle.
651653
* @retval None
652654
*/
653-
#define __HAL_RTC_ALARMA_DISABLE(__HANDLE__) (RTC->CR &= ~(RTC_CR_ALRAE))
655+
#define __HAL_RTC_ALARMA_DISABLE(__HANDLE__) (UNUSED(__HANDLE__), (RTC->CR &= ~(RTC_CR_ALRAE)))
654656

655657
/**
656658
* @brief Enable the RTC ALARMB peripheral.
657659
* @param __HANDLE__ specifies the RTC handle.
658660
* @retval None
659661
*/
660-
#define __HAL_RTC_ALARMB_ENABLE(__HANDLE__) (RTC->CR |= (RTC_CR_ALRBE))
662+
#define __HAL_RTC_ALARMB_ENABLE(__HANDLE__) (UNUSED(__HANDLE__), (RTC->CR |= (RTC_CR_ALRBE)))
661663

662664
/**
663665
* @brief Disable the RTC ALARMB peripheral.
664666
* @param __HANDLE__ specifies the RTC handle.
665667
* @retval None
666668
*/
667-
#define __HAL_RTC_ALARMB_DISABLE(__HANDLE__) (RTC->CR &= ~(RTC_CR_ALRBE))
669+
#define __HAL_RTC_ALARMB_DISABLE(__HANDLE__) (UNUSED(__HANDLE__), (RTC->CR &= ~(RTC_CR_ALRBE)))
668670

669671
/**
670672
* @brief Enable the RTC Alarm interrupt.
@@ -675,7 +677,7 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to
675677
* @arg @ref RTC_IT_ALRB Alarm B interrupt
676678
* @retval None
677679
*/
678-
#define __HAL_RTC_ALARM_ENABLE_IT(__HANDLE__, __INTERRUPT__) (RTC->CR |= (__INTERRUPT__))
680+
#define __HAL_RTC_ALARM_ENABLE_IT(__HANDLE__, __INTERRUPT__) (UNUSED(__HANDLE__), (RTC->CR |= (__INTERRUPT__)))
679681

680682
/**
681683
* @brief Disable the RTC Alarm interrupt.
@@ -686,7 +688,7 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to
686688
* @arg @ref RTC_IT_ALRB Alarm B interrupt
687689
* @retval None
688690
*/
689-
#define __HAL_RTC_ALARM_DISABLE_IT(__HANDLE__, __INTERRUPT__) (RTC->CR &= ~(__INTERRUPT__))
691+
#define __HAL_RTC_ALARM_DISABLE_IT(__HANDLE__, __INTERRUPT__) (UNUSED(__HANDLE__), (RTC->CR &= ~(__INTERRUPT__)))
690692

691693
/**
692694
* @brief Check whether the specified RTC Alarm interrupt has occurred or not.
@@ -697,7 +699,7 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to
697699
* @arg @ref RTC_IT_ALRB Alarm B interrupt
698700
* @retval None
699701
*/
700-
#define __HAL_RTC_ALARM_GET_IT(__HANDLE__, __INTERRUPT__) ((((RTC->MISR)& ((__INTERRUPT__)>> 12U)) != 0U) ? 1UL : 0UL)
702+
#define __HAL_RTC_ALARM_GET_IT(__HANDLE__, __INTERRUPT__) (UNUSED(__HANDLE__), ((((RTC->MISR)& ((__INTERRUPT__)>> 12U)) != 0U) ? 1UL : 0UL))
701703

702704
/**
703705
* @brief Check whether the specified RTC Alarm interrupt has been enabled or not.
@@ -708,7 +710,7 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to
708710
* @arg @ref RTC_IT_ALRB Alarm B interrupt
709711
* @retval None
710712
*/
711-
#define __HAL_RTC_ALARM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((RTC->CR) & (__INTERRUPT__)) != 0U) ? 1UL : 0UL)
713+
#define __HAL_RTC_ALARM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (UNUSED(__HANDLE__), ((((RTC->CR) & (__INTERRUPT__)) != 0U) ? 1UL : 0UL))
712714

713715
/**
714716
* @brief Get the selected RTC Alarms flag status.
@@ -730,8 +732,8 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to
730732
* @arg @ref RTC_FLAG_ALRBF
731733
* @retval None
732734
*/
733-
#define __HAL_RTC_ALARM_CLEAR_FLAG(__HANDLE__, __FLAG__) \
734-
(((__FLAG__) == RTC_FLAG_ALRAF) ? ((RTC->SCR = (RTC_CLEAR_ALRAF))) : (RTC->SCR = (RTC_CLEAR_ALRBF)))
735+
#define __HAL_RTC_ALARM_CLEAR_FLAG(__HANDLE__, __FLAG__) (UNUSED(__HANDLE__), \
736+
(((__FLAG__) == RTC_FLAG_ALRAF) ? ((RTC->SCR = (RTC_CLEAR_ALRAF))) : (RTC->SCR = (RTC_CLEAR_ALRBF))))
735737
/**
736738
* @brief Enable interrupt on the RTC Alarm associated Exti line.
737739
* @retval None

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