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lib/stm32: update stm32wba to cube version V1.6.0
Update Cube version for STM32WBAxx series on https://github.com/STMicroelectronics from version v1.5.0 to version v1.6.0 Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <[email protected]>
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lib/stm32wba/BLE_TransparentMode/Core/Inc/app_conf.h

Lines changed: 24 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -155,12 +155,13 @@
155155
*
156156
* When CFG_LPM_LEVEL is set to:
157157
* - 0 : Low Power Mode is not activated, RUN mode will be used.
158-
* - 1 : Low power active, the one selected with CFG_LPM_STDBY_SUPPORTED
159-
* - 2 : In addition, force to disable modules to reach lowest power figures.
158+
* - 1 : Low power active, mode selected with CFG_LPM_STDBY_SUPPORTED
159+
* - 2 : In addition log and debug are disabled to reach lowest power figures.
160160
*
161161
* When CFG_LPM_STDBY_SUPPORTED is set to:
162+
* - 2 : Stop mode 2 is used as low power mode (if supported by target)
162163
* - 1 : Standby is used as low power mode.
163-
* - 0 : Standby is not used, so stop mode 1 is used as low power mode.
164+
* - 0 : Stop mode 1 is used as low power mode.
164165
*
165166
******************************************************************************/
166167
#define CFG_LPM_LEVEL (1)
@@ -214,12 +215,10 @@ typedef enum
214215
/**
215216
* Enable or disable LOG over UART in the application.
216217
* Low power level(CFG_LPM_LEVEL) above 1 will disable LOG.
217-
* Standby low power mode(CFG_LPM_STDBY_SUPPORTED) will disable LOG.
218+
* Standby low power mode(CFG_LPM_STDBY_SUPPORTED) above 0 will disable LOG.
218219
*/
219220
#define CFG_LOG_SUPPORTED (0U)
220221

221-
/* Usart used by LOG */
222-
223222
/* Configure Log display settings */
224223
#define CFG_LOG_INSERT_COLOR_INSIDE_THE_TRACE (0U)
225224
#define CFG_LOG_INSERT_TIME_STAMP_INSIDE_THE_TRACE (0U)
@@ -238,6 +237,18 @@ typedef enum
238237

239238
/******************************************************************************
240239
* Configure Log level for Application
240+
*
241+
* APPLI_CONFIG_LOG_LEVEL can be any value of the Log_Verbose_Level_t enum.
242+
*
243+
* APPLI_CONFIG_LOG_REGION can either be :
244+
* - LOG_REGION_ALL_REGIONS to enable all regions
245+
* or
246+
* - One or several specific regions (any value except LOG_REGION_ALL_REGIONS)
247+
* from the Log_Region_t enum and matching the mask value.
248+
*
249+
* For example, to enable both LOG_REGION_BLE and LOG_REGION_APP,
250+
* the value assigned to the define is :
251+
* (1U << LOG_REGION_BLE | 1U << LOG_REGION_APP)
241252
******************************************************************************/
242253
#define APPLI_CONFIG_LOG_LEVEL LOG_VERBOSE_INFO
243254
#define APPLI_CONFIG_LOG_REGION (LOG_REGION_ALL_REGIONS)
@@ -267,8 +278,8 @@ typedef enum
267278
CFG_TASK_BLE_HOST,
268279
CFG_TASK_AMM,
269280
CFG_TASK_BPKA,
270-
CFG_TASK_FLASH_MANAGER,
271281
CFG_TASK_BLE_TIMER_BCKGND,
282+
CFG_TASK_FLASH_MANAGER,
272283
/* USER CODE BEGIN CFG_Task_Id_t */
273284
TASK_BUTTON_1,
274285
TASK_BUTTON_2,
@@ -364,26 +375,15 @@ typedef enum
364375
/******************************************************************************
365376
* HW RADIO configuration
366377
******************************************************************************/
367-
/* Do not modify - must be 1 */
368-
#define USE_RADIO_LOW_ISR (1)
369-
370-
/* Do not modify - must be 1 */
371-
#define NEXT_EVENT_SCHEDULING_FROM_ISR (1)
372-
373378
/* Link Layer uses temperature based calibration (0 --> NO ; 1 --> YES) */
374379
#define USE_TEMPERATURE_BASED_RADIO_CALIBRATION (0)
375380

376381
#define RADIO_INTR_NUM RADIO_IRQn /* 2.4GHz RADIO global interrupt */
377382
#define RADIO_INTR_PRIO_HIGH (0) /* 2.4GHz RADIO interrupt priority when radio is Active */
378383
#define RADIO_INTR_PRIO_LOW (5) /* 2.4GHz RADIO interrupt priority when radio is Not Active - Sleep Timer Only */
379384

380-
#if (USE_RADIO_LOW_ISR == 1)
381385
#define RADIO_SW_LOW_INTR_NUM HASH_IRQn /* Selected interrupt vector for 2.4GHz RADIO low ISR */
382386
#define RADIO_SW_LOW_INTR_PRIO (14) /* 2.4GHz RADIO low ISR priority */
383-
#endif /* USE_RADIO_LOW_ISR */
384-
385-
/* Link Layer supported number of antennas */
386-
#define RADIO_NUM_OF_ANTENNAS (4)
387387

388388
#define RCC_INTR_PRIO (1) /* HSERDY and PLL1RDY */
389389

@@ -396,13 +396,11 @@ typedef enum
396396

397397
#define CFG_EXTERNAL_PA_ENABLE (0)
398398

399-
#define CFG_BLE_AOA_AOD_ENABLE (0)
399+
#define CFG_BLE_AOA_AOD_ENABLE (1)
400+
#define CFG_RADIO_NUM_OF_ANTENNAS (8) /* Link Layer supported number of antennas */
400401

401-
/* Custom LSE sleep clock accuracy to use if both conditions are met:
402-
* - LSE is selected as Link Layer sleep clock source
403-
* - the LSE used is different from the default one.
404-
*/
405-
#define CFG_RADIO_LSE_SLEEP_TIMER_CUSTOM_SCA_RANGE (0)
402+
/* Radio sleep clock LSE accuracy configuration */
403+
#define CFG_RADIO_LSE_SLEEP_TIMER_CUSTOM_SCA_RANGE (0x00)
406404

407405
/* USER CODE BEGIN Radio_Configuration */
408406

@@ -472,12 +470,12 @@ typedef enum
472470
#endif /* CFG_DEBUGGER_LEVEL */
473471
#endif /* CFG_LPM_LEVEL */
474472

475-
#if (CFG_LPM_STDBY_SUPPORTED == 1)
473+
#if (CFG_LPM_STDBY_SUPPORTED != 0) && (CFG_LPM_LEVEL != 0)
476474
#if CFG_LOG_SUPPORTED
477475
#undef CFG_LOG_SUPPORTED
478476
#define CFG_LOG_SUPPORTED (0)
479477
#endif /* CFG_LOG_SUPPORTED */
480-
#endif /* CFG_LPM_STDBY_SUPPORTED */
478+
#endif /* (CFG_LPM_STDBY_SUPPORTED > 0) && (CFG_LPM_LEVEL != 0) */
481479

482480
/* USER CODE BEGIN Defines_2 */
483481

lib/stm32wba/BLE_TransparentMode/STM32_WPAN/Target/linklayer_plat.c

Lines changed: 9 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -34,7 +34,9 @@
3434

3535
#if (CFG_LPM_LEVEL != 0)
3636
#include "stm32_lpm.h"
37+
#include "stm32_lpm_if.h"
3738
#endif /* (CFG_LPM_LEVEL != 0) */
39+
3840
/* USER CODE BEGIN Includes */
3941

4042
/* USER CODE END Includes */
@@ -470,16 +472,15 @@ void LINKLAYER_PLAT_StopRadioEvt(void)
470472
*/
471473
void LINKLAYER_PLAT_RCOStartClbr(void)
472474
{
473-
#if (CFG_SCM_SUPPORTED == 1)
474475
#if (CFG_LPM_LEVEL != 0)
475-
#if (CFG_LPM_STDBY_SUPPORTED == 1)
476-
UTIL_LPM_SetOffMode(1U << CFG_LPM_LL_HW_RCO_CLBR, UTIL_LPM_DISABLE);
477-
#endif /* (CFG_LPM_STDBY_SUPPORTED == 1) */
476+
PWR_DisableSleepMode();
477+
/* Disabling stop mode prevents also from entering in standby */
478478
UTIL_LPM_SetStopMode(1U << CFG_LPM_LL_HW_RCO_CLBR, UTIL_LPM_DISABLE);
479479
#endif /* (CFG_LPM_LEVEL != 0) */
480+
#if (CFG_SCM_SUPPORTED == 1)
480481
scm_setsystemclock(SCM_USER_LL_HW_RCO_CLBR, HSE_32MHZ);
481482
while (LL_PWR_IsActiveFlag_VOS() == 0);
482-
#endif /* CFG_SCM_SUPPORTED */
483+
#endif /* (CFG_SCM_SUPPORTED == 1) */
483484
}
484485

485486
/**
@@ -489,16 +490,14 @@ void LINKLAYER_PLAT_RCOStartClbr(void)
489490
*/
490491
void LINKLAYER_PLAT_RCOStopClbr(void)
491492
{
492-
#if (CFG_SCM_SUPPORTED == 1)
493493
#if (CFG_LPM_LEVEL != 0)
494-
#if (CFG_LPM_STDBY_SUPPORTED == 1)
495-
UTIL_LPM_SetOffMode(1U << CFG_LPM_LL_HW_RCO_CLBR, UTIL_LPM_ENABLE);
496-
#endif /* (CFG_LPM_STDBY_SUPPORTED == 1) */
494+
PWR_EnableSleepMode();
497495
UTIL_LPM_SetStopMode(1U << CFG_LPM_LL_HW_RCO_CLBR, UTIL_LPM_ENABLE);
498496
#endif /* (CFG_LPM_LEVEL != 0) */
497+
#if (CFG_SCM_SUPPORTED == 1)
499498
scm_setsystemclock(SCM_USER_LL_HW_RCO_CLBR, HSE_16MHZ);
500499
while (LL_PWR_IsActiveFlag_VOS() == 0);
501-
#endif /* CFG_SCM_SUPPORTED */
500+
#endif /* (CFG_SCM_SUPPORTED == 1) */
502501
}
503502

504503
/**

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