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FRASTMerwango
FRASTM
authored and
erwango
committed
stm32cube: update stm32wb to cube version V1.23.0
Update Cube version for STM32WBxx series on https://github.com/STMicroelectronics from version v1.22.0 to version v1.23.0 Signed-off-by: F. Ramu <[email protected]>
1 parent 013a1b0 commit 437475c

24 files changed

+168
-103
lines changed

‎stm32cube/stm32wbxx/README‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ Origin:
66
http://www.st.com/en/embedded-software/stm32cubewb.html
77

88
Status:
9-
version v1.22.0
9+
version v1.23.0
1010

1111
Purpose:
1212
ST Microelectronics official MCU package for STM32WB series.
@@ -23,7 +23,7 @@ URL:
2323
https://github.com/STMicroelectronics/STM32CubeWB
2424

2525
Commit:
26-
1bc844d570ccbcfdb40532127fd50161d0b6f207
26+
24e69da13336e90cccce4fccf5b8fddfcd4959fc
2727

2828
Maintained-by:
2929
External

‎stm32cube/stm32wbxx/drivers/include/Legacy/stm32_hal_legacy.h‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -564,6 +564,9 @@ extern "C" {
564564
#define OB_nBOOT0_RESET OB_NBOOT0_RESET
565565
#define OB_nBOOT0_SET OB_NBOOT0_SET
566566
#endif /* STM32U0 */
567+
#if defined(STM32H5)
568+
#define FLASH_ECC_AREA_EDATA FLASH_ECC_AREA_EDATA_BANK1
569+
#endif /* STM32H5 */
567570

568571
/**
569572
* @}
@@ -3698,10 +3701,8 @@ extern "C" {
36983701
#define RCC_SYSCLKSOURCE_STATUS_PLLR RCC_SYSCLKSOURCE_STATUS_PLLCLK
36993702
#endif
37003703

3701-
37023704
#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \
3703-
defined(STM32WL) || defined(STM32C0) || defined(STM32N6) || defined(STM32H7RS) || \
3704-
defined(STM32U0)
3705+
defined(STM32WL) || defined(STM32C0) || defined(STM32N6) || defined(STM32H7RS) || defined(STM32U0)
37053706
#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
37063707
#else
37073708
#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
@@ -3952,7 +3953,7 @@ extern "C" {
39523953
*/
39533954
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \
39543955
defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \
3955-
defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32N6) || defined (STM32H7RS) || \
3956+
defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32N6) || defined (STM32H7RS) || \
39563957
defined (STM32U0) || defined (STM32U3)
39573958
#else
39583959
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG

‎stm32cube/stm32wbxx/drivers/include/stm32wbxx_hal_lptim.h‎

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -441,6 +441,7 @@ typedef void (*pLPTIM_CallbackTypeDef)(LPTIM_HandleTypeDef *hlptim); /*!< poin
441441
* @brief Write the passed parameter in the Autoreload register.
442442
* @param __HANDLE__ LPTIM handle
443443
* @param __VALUE__ Autoreload value
444+
* This parameter must be a value between Min_Data = 0x0001 and Max_Data = 0xFFFF.
444445
* @retval None
445446
* @note The ARR register can only be modified when the LPTIM instance is enabled.
446447
*/
@@ -763,9 +764,6 @@ HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(const LPTIM_HandleTypeDef *hlptim);
763764
#define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \
764765
((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL))
765766

766-
#define IS_LPTIM_AUTORELOAD(__AUTORELOAD__) ((0x00000001UL <= (__AUTORELOAD__)) &&\
767-
((__AUTORELOAD__) <= 0x0000FFFFUL))
768-
769767
#define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFUL)
770768

771769
#define IS_LPTIM_PERIOD(__PERIOD__) ((0x00000001UL <= (__PERIOD__)) &&\

‎stm32cube/stm32wbxx/drivers/include/stm32wbxx_hal_smartcard.h‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -721,13 +721,13 @@ typedef enum
721721
*/
722722
#define __HAL_SMARTCARD_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((__INTERRUPT__) & SMARTCARD_CR_MASK) >>\
723723
SMARTCARD_CR_POS) == 1U)?\
724-
((__HANDLE__)->Instance->CR1 &= ~ (1U <<\
724+
((__HANDLE__)->Instance->CR1 &= ~ (1UL <<\
725725
((__INTERRUPT__) & SMARTCARD_IT_MASK))): \
726726
((((__INTERRUPT__) & SMARTCARD_CR_MASK) >>\
727727
SMARTCARD_CR_POS) == 2U)?\
728-
((__HANDLE__)->Instance->CR2 &= ~ (1U <<\
728+
((__HANDLE__)->Instance->CR2 &= ~ (1UL <<\
729729
((__INTERRUPT__) & SMARTCARD_IT_MASK))): \
730-
((__HANDLE__)->Instance->CR3 &= ~ (1U <<\
730+
((__HANDLE__)->Instance->CR3 &= ~ (1UL <<\
731731
((__INTERRUPT__) & SMARTCARD_IT_MASK))))
732732

733733
/** @brief Check whether the specified SmartCard interrupt has occurred or not.

‎stm32cube/stm32wbxx/drivers/include/stm32wbxx_ll_iwdg.h‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -208,7 +208,7 @@ __STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescale
208208
* @arg @ref LL_IWDG_PRESCALER_128
209209
* @arg @ref LL_IWDG_PRESCALER_256
210210
*/
211-
__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx)
211+
__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(const IWDG_TypeDef *IWDGx)
212212
{
213213
return (READ_REG(IWDGx->PR));
214214
}
@@ -231,7 +231,7 @@ __STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Coun
231231
* @param IWDGx IWDG Instance
232232
* @retval Value between Min_Data=0 and Max_Data=0x0FFF
233233
*/
234-
__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx)
234+
__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(const IWDG_TypeDef *IWDGx)
235235
{
236236
return (READ_REG(IWDGx->RLR));
237237
}
@@ -254,7 +254,7 @@ __STATIC_INLINE void LL_IWDG_SetWindow(IWDG_TypeDef *IWDGx, uint32_t Window)
254254
* @param IWDGx IWDG Instance
255255
* @retval Value between Min_Data=0 and Max_Data=0x0FFF
256256
*/
257-
__STATIC_INLINE uint32_t LL_IWDG_GetWindow(IWDG_TypeDef *IWDGx)
257+
__STATIC_INLINE uint32_t LL_IWDG_GetWindow(const IWDG_TypeDef *IWDGx)
258258
{
259259
return (READ_REG(IWDGx->WINR));
260260
}
@@ -273,7 +273,7 @@ __STATIC_INLINE uint32_t LL_IWDG_GetWindow(IWDG_TypeDef *IWDGx)
273273
* @param IWDGx IWDG Instance
274274
* @retval State of bit (1 or 0).
275275
*/
276-
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx)
276+
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(const IWDG_TypeDef *IWDGx)
277277
{
278278
return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL);
279279
}
@@ -284,7 +284,7 @@ __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx)
284284
* @param IWDGx IWDG Instance
285285
* @retval State of bit (1 or 0).
286286
*/
287-
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx)
287+
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(const IWDG_TypeDef *IWDGx)
288288
{
289289
return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL);
290290
}
@@ -295,7 +295,7 @@ __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx)
295295
* @param IWDGx IWDG Instance
296296
* @retval State of bit (1 or 0).
297297
*/
298-
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(IWDG_TypeDef *IWDGx)
298+
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(const IWDG_TypeDef *IWDGx)
299299
{
300300
return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL);
301301
}
@@ -308,7 +308,7 @@ __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(IWDG_TypeDef *IWDGx)
308308
* @param IWDGx IWDG Instance
309309
* @retval State of bits (1 or 0).
310310
*/
311-
__STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx)
311+
__STATIC_INLINE uint32_t LL_IWDG_IsReady(const IWDG_TypeDef *IWDGx)
312312
{
313313
return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL);
314314
}

‎stm32cube/stm32wbxx/drivers/src/stm32wbxx_hal.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -56,7 +56,7 @@
5656
*/
5757
#define __STM32WBxx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
5858
#define __STM32WBxx_HAL_VERSION_SUB1 (0x0EU) /*!< [23:16] sub1 version */
59-
#define __STM32WBxx_HAL_VERSION_SUB2 (0x05U) /*!< [15:8] sub2 version */
59+
#define __STM32WBxx_HAL_VERSION_SUB2 (0x06U) /*!< [15:8] sub2 version */
6060
#define __STM32WBxx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
6161
#define __STM32WBxx_HAL_VERSION ((__STM32WBxx_HAL_VERSION_MAIN << 24U)\
6262
|(__STM32WBxx_HAL_VERSION_SUB1 << 16U)\

‎stm32cube/stm32wbxx/drivers/src/stm32wbxx_hal_i2c.c‎

Lines changed: 55 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -3277,6 +3277,8 @@ HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAdd
32773277

32783278
__IO uint32_t I2C_Trials = 0UL;
32793279

3280+
HAL_StatusTypeDef status = HAL_OK;
3281+
32803282
FlagStatus tmp1;
32813283
FlagStatus tmp2;
32823284

@@ -3334,37 +3336,64 @@ HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAdd
33343336
/* Wait until STOPF flag is reset */
33353337
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK)
33363338
{
3337-
return HAL_ERROR;
3339+
/* A non acknowledge appear during STOP Flag waiting process, a new trial must be performed */
3340+
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3341+
{
3342+
/* Clear STOP Flag */
3343+
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
3344+
3345+
/* Reset the error code for next trial */
3346+
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
3347+
}
3348+
else
3349+
{
3350+
status = HAL_ERROR;
3351+
}
33383352
}
3353+
else
3354+
{
3355+
/* A acknowledge appear during STOP Flag waiting process, this mean that device respond to its address */
33393356

3340-
/* Clear STOP Flag */
3341-
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
3357+
/* Clear STOP Flag */
3358+
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
33423359

3343-
/* Device is ready */
3344-
hi2c->State = HAL_I2C_STATE_READY;
3360+
/* Device is ready */
3361+
hi2c->State = HAL_I2C_STATE_READY;
33453362

3346-
/* Process Unlocked */
3347-
__HAL_UNLOCK(hi2c);
3363+
/* Process Unlocked */
3364+
__HAL_UNLOCK(hi2c);
33483365

3349-
return HAL_OK;
3366+
return HAL_OK;
3367+
}
33503368
}
33513369
else
33523370
{
3353-
/* Wait until STOPF flag is reset */
3354-
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK)
3355-
{
3356-
return HAL_ERROR;
3357-
}
3371+
/* A non acknowledge is detected, this mean that device not respond to its address,
3372+
a new trial must be performed */
33583373

33593374
/* Clear NACK Flag */
33603375
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
33613376

3362-
/* Clear STOP Flag, auto generated with autoend*/
3363-
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
3377+
/* Wait until STOPF flag is reset */
3378+
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK)
3379+
{
3380+
status = HAL_ERROR;
3381+
}
3382+
else
3383+
{
3384+
/* Clear STOP Flag, auto generated with autoend*/
3385+
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
3386+
}
33643387
}
33653388

33663389
/* Increment Trials */
33673390
I2C_Trials++;
3391+
3392+
if ((I2C_Trials < Trials) && (status == HAL_ERROR))
3393+
{
3394+
status = HAL_OK;
3395+
}
3396+
33683397
} while (I2C_Trials < Trials);
33693398

33703399
/* Update I2C state */
@@ -6377,7 +6406,7 @@ static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)
63776406
/* Increment Buffer pointer */
63786407
hi2c->pBuffPtr++;
63796408

6380-
if ((hi2c->XferSize > 0U))
6409+
if (hi2c->XferSize > 0U)
63816410
{
63826411
hi2c->XferSize--;
63836412
hi2c->XferCount--;
@@ -6533,7 +6562,7 @@ static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)
65336562
/* Increment Buffer pointer */
65346563
hi2c->pBuffPtr++;
65356564

6536-
if ((hi2c->XferSize > 0U))
6565+
if (hi2c->XferSize > 0U)
65376566
{
65386567
hi2c->XferSize--;
65396568
hi2c->XferCount--;
@@ -6987,7 +7016,7 @@ static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uin
69877016
{
69887017
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
69897018
{
6990-
if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == Status))
7019+
if (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
69917020
{
69927021
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
69937022
hi2c->State = HAL_I2C_STATE_READY;
@@ -7027,7 +7056,7 @@ static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c,
70277056
{
70287057
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
70297058
{
7030-
if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET))
7059+
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)
70317060
{
70327061
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
70337062
hi2c->State = HAL_I2C_STATE_READY;
@@ -7066,7 +7095,7 @@ static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c,
70667095
/* Check for the Timeout */
70677096
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
70687097
{
7069-
if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET))
7098+
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
70707099
{
70717100
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
70727101
hi2c->State = HAL_I2C_STATE_READY;
@@ -7144,7 +7173,7 @@ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c,
71447173
/* Check for the Timeout */
71457174
if ((((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) && (status == HAL_OK))
71467175
{
7147-
if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET))
7176+
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
71487177
{
71497178
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
71507179
hi2c->State = HAL_I2C_STATE_READY;
@@ -7311,15 +7340,17 @@ static HAL_StatusTypeDef I2C_IsErrorOccurred(I2C_HandleTypeDef *hi2c, uint32_t T
73117340
static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode,
73127341
uint32_t Request)
73137342
{
7343+
uint32_t tmp;
7344+
73147345
/* Check the parameters */
73157346
assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
73167347
assert_param(IS_TRANSFER_MODE(Mode));
73177348
assert_param(IS_TRANSFER_REQUEST(Request));
73187349

73197350
/* Declaration of tmp to prevent undefined behavior of volatile usage */
7320-
uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \
7321-
(((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \
7322-
(uint32_t)Mode | (uint32_t)Request) & (~0x80000000U));
7351+
tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \
7352+
(((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \
7353+
(uint32_t)Mode | (uint32_t)Request) & (~0x80000000U));
73237354

73247355
/* update CR2 register */
73257356
MODIFY_REG(hi2c->Instance->CR2, \

‎stm32cube/stm32wbxx/drivers/src/stm32wbxx_hal_iwdg.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -126,7 +126,8 @@
126126
The timeout value is multiplied by 1000 to be converted in milliseconds.
127127
LSI startup time is also considered here by adding LSI_STARTUP_TIME
128128
converted in milliseconds. */
129-
#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL))
129+
#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / (LSI_VALUE / 128U)) + \
130+
((LSI_STARTUP_TIME / 1000UL) + 1UL))
130131
#define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU)
131132
/**
132133
* @}

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